]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/commit
drm/amd/display: Unconditionally clear training pattern set after lt
authorWesley Chalmers <Wesley.Chalmers@amd.com>
Mon, 5 Apr 2021 23:35:37 +0000 (19:35 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 21 Apr 2021 01:41:12 +0000 (21:41 -0400)
commit97d1765e67d61c45748deccc428ea2793983f86d
treecd03b98be6df2a57e30c5286b2416e0aa6df2244
parent41ef8fbbef8e21e01c94105ed87b3a772b868439
drm/amd/display: Unconditionally clear training pattern set after lt

[WHY]
While Link Training is being performed,
and the LTTPRs are in Non-LTTPR or LTTPR Transparent mode,
any DPCD registers besides those used for Link Training are not to be
accessed.

The spec defines the link training registers as DP_TRAINING_PATTERN_SET
(102h) to DP_TRAINING_LANE3_SET (106h), and DP_LANE0_1_STATUS (202h)
to DP_ADJUST_REQUEST_LANE2_3 (207h).

[HOW]
Move the current write to DPCD Address DP_LINK_TRAINING_PATTERN_SET out
of its conditional block.

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c