]> git.proxmox.com Git - mirror_qemu.git/commit
target/riscv: Remove RVB (replaced by Zb[abcs])
authorPhilipp Tomsich <philipp.tomsich@vrull.eu>
Sat, 11 Sep 2021 14:00:15 +0000 (16:00 +0200)
committerAlistair Francis <alistair.francis@wdc.com>
Wed, 6 Oct 2021 22:41:33 +0000 (08:41 +1000)
commit9916ea3c97f6cbd46d912ecc80dfe94baed5d288
tree31a71b2c8a333c48d20f4f7c55de8784363dc6b0
parent06dfa8a5c5e79c2be7672b0a56e08c7f6d350148
target/riscv: Remove RVB (replaced by Zb[abcs])

With everything classified as Zb[abcs] and pre-0.93 draft-B
instructions that are not part of Zb[abcs] removed, we can remove the
remaining support code for RVB.

Note that RVB has been retired for good and misa.B will neither mean
'some' or 'all of' Zb*:
  https://lists.riscv.org/g/tech-bitmanip/message/532

Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id: 20210911140016.834071-16-philipp.tomsich@vrull.eu
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.c
target/riscv/cpu.h
target/riscv/insn32.decode