]> git.proxmox.com Git - mirror_qemu.git/commit
riscv: sifive: Implement a model for SiFive FU540 OTP
authorBin Meng <bmeng.cn@gmail.com>
Fri, 6 Sep 2019 16:20:15 +0000 (09:20 -0700)
committerPalmer Dabbelt <palmer@sifive.com>
Tue, 17 Sep 2019 15:42:49 +0000 (08:42 -0700)
commit9fb45c62ae88726eb472656ae90683098473041a
tree8a614132d6f692170fab9c1738849b0a3308fd67
parent6c141fb7dddcb1c8d8f55377c4a867682655e8f8
riscv: sifive: Implement a model for SiFive FU540 OTP

This implements a simple model for SiFive FU540 OTP (One-Time
Programmable) Memory interface, primarily for reading out the
stored serial number from the first 1 KiB of the 16 KiB OTP
memory reserved by SiFive for internal use.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
hw/riscv/Makefile.objs
hw/riscv/sifive_u_otp.c [new file with mode: 0644]
include/hw/riscv/sifive_u_otp.h [new file with mode: 0644]