]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/commit
net: phy: dp83867: Fix initialization of PHYCR register
authorStefan Hauser <stefan@shauser.net>
Fri, 1 Jul 2016 20:35:03 +0000 (22:35 +0200)
committerDavid S. Miller <davem@davemloft.net>
Sat, 2 Jul 2016 18:48:58 +0000 (14:48 -0400)
commitb291c418172f2cfbe009d81cd9a92f7a2de7c579
treeb879e2002b06d030368ce56df408d883b6514d4e
parent373819ec391de0d11f63b10b2fb69ef2854236ca
net: phy: dp83867: Fix initialization of PHYCR register

When initializing the PHY control register, the FIFO depth bits are
written without reading the previous register value, i.e. all other
bits are overwritten with zero. This disables automatic MDI-X
configuration, which is enabled by default. Fix initialization by doing
a read/modify/write operation.

Signed-off-by: Stefan Hauser <stefan@shauser.net>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/phy/dp83867.c