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MIPS: Netlogic: Avoid unnecessary cache flushes
authorJayachandran C <jayachandranc@netlogicmicro.com>
Tue, 23 Aug 2011 08:05:51 +0000 (13:35 +0530)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 7 Dec 2011 22:04:54 +0000 (22:04 +0000)
commitb66f953cd00e7c309c33ea35acd95b13a027050f
treeea1e3d5cb030044b536d53d086b4ae6ba6abff89tree
parent11d48aace2e47617eeb1fe8a4a073e40e6d480aacommit | diff
MIPS: Netlogic: Avoid unnecessary cache flushes

XLR dcache is fully coherent across CPUs, so avoid unnecessary dcache
flushes.

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2729/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h diff | blob | blame | history
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