]> git.proxmox.com Git - mirror_ubuntu-kernels.git/commit
drm/i915: Try to preserve the current shared_dpll for fastset on type-c ports
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 18 Jan 2024 14:24:36 +0000 (16:24 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 23 Jan 2024 08:44:14 +0000 (10:44 +0200)
commitba407525f8247ee4c270369f3371b9994c27bfda
tree4d5b389dbc24debb655f2362bd2af1d27f7abef3
parent6bc41f9cf252385d3a24e63ce6e2c955dd35c0b2
drm/i915: Try to preserve the current shared_dpll for fastset on type-c ports

Currently icl_compute_tc_phy_dplls() assumes that the active
PLL will be the TC PLL (as opposed to the TBT PLL). The actual
PLL will be selected during the modeset enable sequence, but
we need to put *something* into the crtc_state->shared_dpll
already during compute_config().

The downside of assuming one PLL or the other is that we'll
fail to fastset if the assumption doesn't match what was in
use previously. So let's instead keep the same PLL that was
in use previously (assuming there was one). This should allow
fastset to work again when using TBT PLL, at least in the
steady state.

Now, assuming we want keep the same PLL may not be entirely
correct either. But we should be covered by the type-c link
reset handling which will force a full modeset by flagging
connectors_changed=true which means the resulting modeset
can't be converted into a fastset even if the full crtc state
looks identical.

Cc: Imre Deak <imre.deak@intel.com>
Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240118142436.25928-1-ville.syrjala@linux.intel.com
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
drivers/gpu/drm/i915/display/intel_dpll_mgr.c