]> git.proxmox.com Git - mirror_ubuntu-kernels.git/commit
arm64: insn: Fix ldadd instruction encoding
authorJean-Philippe Brucker <jean-philippe.brucker@arm.com>
Fri, 24 May 2019 12:52:19 +0000 (13:52 +0100)
committerWill Deacon <will.deacon@arm.com>
Fri, 24 May 2019 13:58:29 +0000 (14:58 +0100)
commitc5e2edeb01ae9ffbdde95bdcdb6d3614ba1eb195
tree9f03c254d8bded01ec1e0442152711b6690c6a9e
parent96a13f57b946be7a6c10405e4bd780c0b6b6fe63
arm64: insn: Fix ldadd instruction encoding

GCC 8.1.0 reports that the ldadd instruction encoding, recently added to
insn.c, doesn't match the mask and couldn't possibly be identified:

 linux/arch/arm64/include/asm/insn.h: In function 'aarch64_insn_is_ldadd':
 linux/arch/arm64/include/asm/insn.h:280:257: warning: bitwise comparison always evaluates to false [-Wtautological-compare]

Bits [31:30] normally encode the size of the instruction (1 to 8 bytes)
and the current instruction value only encodes the 4- and 8-byte
variants. At the moment only the BPF JIT needs this instruction, and
doesn't require the 1- and 2-byte variants, but to be consistent with
our other ldr and str instruction encodings, clear the size field in the
insn value.

Fixes: 34b8ab091f9ef57a ("bpf, arm64: use more scalable stadd over ldxr / stxr loop in xadd")
Acked-by: Daniel Borkmann <daniel@iogearbox.net>
Reported-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/include/asm/insn.h