]> git.proxmox.com Git - mirror_qemu.git/commit
target/riscv: Reduce overhead of MSTATUS_SUM change
authorFei Wu <fei2.wu@intel.com>
Wed, 12 Apr 2023 11:43:15 +0000 (13:43 +0200)
committerAlistair Francis <alistair.francis@wdc.com>
Fri, 5 May 2023 00:49:50 +0000 (10:49 +1000)
commitc8f8a9957ea20ac4ba0588ddd00130e8dcf41d93
treeda490700c2c0e7a5a1e0e4a6b6cef2f006b214f6
parent47debc7280430cc7665af2cb70caa1a4325ca060
target/riscv: Reduce overhead of MSTATUS_SUM change

Kernel needs to access user mode memory e.g. during syscalls, the window
is usually opened up for a very limited time through MSTATUS.SUM, the
overhead is too much if tlb_flush() gets called for every SUM change.

This patch creates a separate MMU index for S+SUM, so that it's not
necessary to flush tlb anymore when SUM changes. This is similar to how
ARM handles Privileged Access Never (PAN).

Result of 'pipe 10' from unixbench boosts from 223656 to 1705006. Many
other syscalls benefit a lot from this too.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Fei Wu <fei2.wu@intel.com>
Message-Id: <20230324054154.414846-3-fei2.wu@intel.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Tested-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-Id: <20230325105429.1142530-8-richard.henderson@linaro.org>
Message-Id: <20230412114333.118895-8-richard.henderson@linaro.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.h
target/riscv/cpu_helper.c
target/riscv/csr.c
target/riscv/insn_trans/trans_rvh.c.inc
target/riscv/internals.h
target/riscv/op_helper.c