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author	Richard Henderson <richard.henderson@linaro.org>
	Mon, 1 May 2023 09:57:11 +0000 (10:57 +0100)
committer	Richard Henderson <richard.henderson@linaro.org>
	Mon, 5 Jun 2023 19:04:28 +0000 (12:04 -0700)
commit	d46259c037e51fb6516199305fe8f0994df3d46e
tree	4a2cedcb5ce045685b565a0947f5dbb479556c07	tree
parent	e5b490637708a688e303a51d47fea3bd14ec98f6	commit \| diff

tcg: Split out tcg-target-reg-bits.h

Often, the only thing we need to know about the TCG host
is the register size.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

18 files changed:

include/tcg/tcg.h		diff \| blob \| blame \| history
tcg/aarch64/tcg-target-reg-bits.h	[new file with mode: 0644]	blob
tcg/arm/tcg-target-reg-bits.h	[new file with mode: 0644]	blob
tcg/i386/tcg-target-reg-bits.h	[new file with mode: 0644]	blob
tcg/i386/tcg-target.h		diff \| blob \| blame \| history
tcg/loongarch64/tcg-target-reg-bits.h	[new file with mode: 0644]	blob
tcg/loongarch64/tcg-target.h		diff \| blob \| blame \| history
tcg/mips/tcg-target-reg-bits.h	[new file with mode: 0644]	blob
tcg/mips/tcg-target.h		diff \| blob \| blame \| history
tcg/ppc/tcg-target-reg-bits.h	[new file with mode: 0644]	blob
tcg/ppc/tcg-target.h		diff \| blob \| blame \| history
tcg/riscv/tcg-target-reg-bits.h	[new file with mode: 0644]	blob
tcg/riscv/tcg-target.h		diff \| blob \| blame \| history
tcg/s390x/tcg-target-reg-bits.h	[new file with mode: 0644]	blob
tcg/s390x/tcg-target.c.inc		diff \| blob \| blame \| history
tcg/sparc64/tcg-target-reg-bits.h	[new file with mode: 0644]	blob
tcg/tci/tcg-target-reg-bits.h	[new file with mode: 0644]	blob
tcg/tci/tcg-target.h		diff \| blob \| blame \| history

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