]> git.proxmox.com Git - mirror_qemu.git/commit
target/riscv: Simplify arguments for riscv_csrrw_check
authorWeiwei Li <liweiwei@iscas.ac.cn>
Thu, 9 Mar 2023 07:13:29 +0000 (15:13 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Fri, 5 May 2023 00:49:49 +0000 (10:49 +1000)
commitd53ae79b2895218c03a1e5e5c83049567215ab2e
tree8bbf510da9416bdb321613c86a8e47af30de28a8
parentbbb9fc2591cdecfa40ba7791101e91c83441ed49
target/riscv: Simplify arguments for riscv_csrrw_check

Remove RISCVCPU argument, and get cfg infomation from CPURISCVState
directly.

Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230309071329.45932-5-liweiwei@iscas.ac.cn>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/csr.c