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(parent: c022630) | patch
MIPS: Fix decoding of c0_config1 for MIPSxx caches with 32 ways per set.
authorDouglas Leung <douglas@mips.com>
Thu, 19 Jul 2012 07:11:13 +0000 (09:11 +0200)
committerRalf Baechle <ralf@linux-mips.org>
Thu, 19 Jul 2012 09:23:43 +0000 (11:23 +0200)
commitdc34b05fea0cc9a869863b929f37f1e8ce30edf4
treead064e7dcf5235d8c51060ed0c8db167c5490bd3tree
parentc022630633624a75b3b58f43dd3c6cc896a56cffcommit | diff
MIPS: Fix decoding of c0_config1 for MIPSxx caches with 32 ways per set.

This affects certain 4Kc cores.

Signed-off-by: Douglas Leung <douglas@mips.com>
Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3855/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/mm/c-r4k.c diff | blob | blame | history
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