]> git.proxmox.com Git - mirror_ubuntu-kernels.git/commit
perf/x86/amd: Enable northbridge performance counters on AMD family 15h
authorJacob Shin <jacob.shin@amd.com>
Wed, 6 Feb 2013 17:26:29 +0000 (11:26 -0600)
committerIngo Molnar <mingo@kernel.org>
Sat, 16 Feb 2013 08:37:27 +0000 (09:37 +0100)
commite259514eef764a5286873618e34c560ecb6cff13
tree2ab5514cd2390f2392d8b55988c62ebe0163317d
parent6a71e69f78fbcb453f4444a8288ea8b7cdc7cea4
perf/x86/amd: Enable northbridge performance counters on AMD family 15h

On AMD family 15h processors, there are 4 new performance
counters (in addition to 6 core performance counters) that can
be used for counting northbridge events (i.e. DRAM accesses).

Their bit fields are almost identical to the core performance
counters. However, unlike the core performance counters, these
MSRs are shared between multiple cores (that share the same
northbridge).

We will reuse the same code path as existing family 10h
northbridge event constraints handler logic to enforce
this sharing.

Signed-off-by: Jacob Shin <jacob.shin@amd.com>
Acked-by: Stephane Eranian <eranian@google.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Jacob Shin <jacob.shin@amd.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1360171589-6381-7-git-send-email-jacob.shin@amd.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/include/asm/cpufeature.h
arch/x86/include/asm/perf_event.h
arch/x86/include/uapi/asm/msr-index.h
arch/x86/kernel/cpu/perf_event_amd.c