]> git.proxmox.com Git - mirror_qemu.git/commit
riscv: Skip checking CSR privilege level in debugger mode
authorBin Meng <bmeng.cn@gmail.com>
Fri, 20 Sep 2019 14:47:14 +0000 (07:47 -0700)
committerPalmer Dabbelt <palmer@sifive.com>
Mon, 28 Oct 2019 14:46:53 +0000 (07:46 -0700)
commite6e03dcffd3583f6fd8148108e65d514b8382c2c
tree22ea70c5fb7ee07ce8f3afd6944346fcffd45725
parent9bb73502321d46f4d320fa17aa38201445783fc4
riscv: Skip checking CSR privilege level in debugger mode

If we are in debugger mode, skip the CSR privilege level checking
so that we can read/write all CSRs. Otherwise we get:

(gdb) p/x $mtvec
Could not fetch register "mtvec"; remote failure reply 'E14'

when the hart is currently in S-mode.

Reported-by: Zong Li <zong.li@sifive.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
target/riscv/csr.c