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(parent: 419336a) | patch
xilinx_spips: Generalised to model QSPI
authorPeter Crosthwaite <peter.crosthwaite@xilinx.com>
Mon, 15 Oct 2012 04:37:04 +0000 (14:37 +1000)
committerPeter Crosthwaite <peter.crosthwaite@xilinx.com>
Mon, 29 Oct 2012 06:38:26 +0000 (16:38 +1000)
commitf12411440b5d9e96af0720dd47b484c1440f4d62
tree0189f8fc433cde6b733bd03897c50cfd9ff835d2tree
parent419336a9f934d6a6c7098648bc833137a5db2015commit | diff
xilinx_spips: Generalised to model QSPI

Extended the xilinx spips controller to model QSPI as well. Paremeterised the
operational difference with the normal spi controller (num_ss_bits, width of the
tx/rx fifo heads etc.). Multiple bus functionality is modelled (needed for QSPI
dual parallel mode. LQSPI is modelled.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
hw/xilinx_spips.c diff | blob | blame | history
Qemu copy for testing