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MIPS: SEAD3: Enable LL/SC.
authorRalf Baechle <ralf@linux-mips.org>
Tue, 12 Mar 2013 15:06:07 +0000 (16:06 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Tue, 12 Mar 2013 17:58:09 +0000 (18:58 +0100)
commitf4cdb6a00c148e7724ada0998643b293a52b5f62
tree69d7d9ccfca7d8f9fee2effd69a0b2ae055b3b2ftree
parent631b0af98c1efb160f02154743ae9f13fe03e347commit | diff
MIPS: SEAD3: Enable LL/SC.

All synthesizable CPU cores that could be loaded into a SEAD3's FPGA are
MIPS32 or MIPS64 CPUs that have ll/sc.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h diff | blob | blame | history
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