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(parent: c859a24) | patch
disas/riscv: Add support for XVentanaCondOps
authorChristoph Müllner <christoph.muellner@vrull.eu>
Mon, 12 Jun 2023 11:10:33 +0000 (13:10 +0200)
committerAlistair Francis <alistair.francis@wdc.com>
Mon, 10 Jul 2023 12:29:14 +0000 (22:29 +1000)
commitf6f72338d80ec6f15a6b18643797bc10901aadf3
tree177d8d276aa4dd93393fcce5b8268db4878b5762tree
parentc859a2424dbbae8f5ea64c0f8445981402cd8552commit | diff
disas/riscv: Add support for XVentanaCondOps

This patch adds XVentanaCondOps support to the RISC-V disassembler.

Co-developed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-Id: <20230612111034.3955227-8-christoph.muellner@vrull.eu>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
disas/meson.build diff | blob | blame | history
disas/riscv-xventana.c [new file with mode: 0644] blob
disas/riscv-xventana.h [new file with mode: 0644] blob
disas/riscv.c diff | blob | blame | history
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