]> git.proxmox.com Git - mirror_qemu.git/commit
RISC-V: Use riscv prefix consistently on cpu helpers
authorMichael Clark <mjc@sifive.com>
Mon, 14 Jan 2019 23:58:23 +0000 (23:58 +0000)
committerPalmer Dabbelt <palmer@sifive.com>
Mon, 11 Feb 2019 23:56:21 +0000 (15:56 -0800)
commitfb73883964099011d34c052658e5ad8be049da61
tree86f282b08a834767090233fdd02cc245b70e4561
parent7f2b5ff125d518a7fff9f6a4c633e3063fd75ec3
RISC-V: Use riscv prefix consistently on cpu helpers

* Add riscv prefix to raise_exception function
* Add riscv prefix to CSR read/write functions
* Add riscv prefix to signal handler function
* Add riscv prefix to get fflags function
* Remove redundant declaration of riscv_cpu_init
  and rename cpu_riscv_init to riscv_cpu_init
* rename riscv_set_mode to riscv_cpu_set_mode

Signed-off-by: Michael Clark <mjc@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
linux-user/riscv/signal.c
target/riscv/cpu.h
target/riscv/cpu_helper.c
target/riscv/csr.c
target/riscv/fpu_helper.c
target/riscv/op_helper.c