The sh_pfc_pin structure supplied in SoC data contains information about
pin configuration and name. It's abused to store GPIO data registers
information and pin config type. Move those fields out of the
pinmux_data_reg structure into the new sh_pfc_gpio_pin and
sh_pfc_pin_config structures.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
-struct sh_pfc_pin *sh_pfc_get_pin(struct sh_pfc *pfc, unsigned int pin)
+int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin)
{
unsigned int offset;
unsigned int i;
if (pfc->info->ranges == NULL)
{
unsigned int offset;
unsigned int i;
if (pfc->info->ranges == NULL)
- return &pfc->info->pins[pin];
for (i = 0, offset = 0; i < pfc->info->nr_ranges; ++i) {
const struct pinmux_range *range = &pfc->info->ranges[i];
if (pin <= range->end)
return pin >= range->begin
for (i = 0, offset = 0; i < pfc->info->nr_ranges; ++i) {
const struct pinmux_range *range = &pfc->info->ranges[i];
if (pin <= range->end)
return pin >= range->begin
- ? &pfc->info->pins[offset + pin - range->begin]
- : NULL;
+ ? offset + pin - range->begin : -1;
offset += range->end - range->begin + 1;
}
offset += range->end - range->begin + 1;
}
}
static int sh_pfc_enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
}
static int sh_pfc_enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
struct sh_pfc *pfc;
int ret;
struct sh_pfc *pfc;
int ret;
- /*
- * Ensure that the type encoding fits
- */
- BUILD_BUG_ON(PINMUX_FLAG_TYPE > ((1 << PINMUX_FLAG_DBIT_SHIFT) - 1));
-
info = pdev->id_entry->driver_data
? (void *)pdev->id_entry->driver_data : pdev->dev.platform_data;
if (info == NULL)
info = pdev->id_entry->driver_data
? (void *)pdev->id_entry->driver_data : pdev->dev.platform_data;
if (info == NULL)
void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width,
unsigned long data);
void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width,
unsigned long data);
-struct sh_pfc_pin *sh_pfc_get_pin(struct sh_pfc *pfc, unsigned int pin);
+int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin);
int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type,
int cfg_mode);
int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type,
int cfg_mode);
+struct sh_pfc_gpio_pin {
+ u8 dbit;
+ u8 dreg;
+};
+
- struct sh_pfc *pfc;
- struct gpio_chip gpio_chip;
+ struct sh_pfc *pfc;
+ struct gpio_chip gpio_chip;
- struct sh_pfc_window *mem;
+ struct sh_pfc_window *mem;
struct sh_pfc_gpio_data_reg *regs;
struct sh_pfc_gpio_data_reg *regs;
+ struct sh_pfc_gpio_pin *pins;
};
static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc)
};
static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc)
struct sh_pfc_gpio_data_reg **reg,
unsigned int *bit)
{
struct sh_pfc_gpio_data_reg **reg,
unsigned int *bit)
{
- struct sh_pfc_pin *gpiop = sh_pfc_get_pin(chip->pfc, gpio);
- unsigned int reg_idx;
+ int idx = sh_pfc_get_pin_index(chip->pfc, gpio);
+ struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx];
- reg_idx = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT;
-
- *reg = &chip->regs[reg_idx];
- *bit = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT;
+ *reg = &chip->regs[gpio_pin->dreg];
+ *bit = gpio_pin->dbit;
}
static unsigned long gpio_read_data_reg(struct sh_pfc_chip *chip,
}
static unsigned long gpio_read_data_reg(struct sh_pfc_chip *chip,
sh_pfc_write_raw_reg(mem, dreg->reg_width, value);
}
sh_pfc_write_raw_reg(mem, dreg->reg_width, value);
}
-static void gpio_setup_data_reg(struct sh_pfc *pfc, unsigned gpio)
+static void gpio_setup_data_reg(struct sh_pfc_chip *chip, unsigned gpio)
- struct sh_pfc_pin *gpiop = &pfc->info->pins[gpio];
+ struct sh_pfc *pfc = chip->pfc;
+ struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[gpio];
+ struct sh_pfc_pin *pin = &pfc->info->pins[gpio];
const struct pinmux_data_reg *dreg;
unsigned int bit;
unsigned int i;
for (i = 0, dreg = pfc->info->data_regs; dreg->reg; ++i, ++dreg) {
for (bit = 0; bit < dreg->reg_width; bit++) {
const struct pinmux_data_reg *dreg;
unsigned int bit;
unsigned int i;
for (i = 0, dreg = pfc->info->data_regs; dreg->reg; ++i, ++dreg) {
for (bit = 0; bit < dreg->reg_width; bit++) {
- if (dreg->enum_ids[bit] == gpiop->enum_id) {
- gpiop->flags &= ~PINMUX_FLAG_DREG;
- gpiop->flags |= i << PINMUX_FLAG_DREG_SHIFT;
- gpiop->flags &= ~PINMUX_FLAG_DBIT;
- gpiop->flags |= bit << PINMUX_FLAG_DBIT_SHIFT;
+ if (dreg->enum_ids[bit] == pin->enum_id) {
+ gpio_pin->dreg = i;
+ gpio_pin->dbit = bit;
if (pfc->info->pins[i].enum_id == 0)
continue;
if (pfc->info->pins[i].enum_id == 0)
continue;
- gpio_setup_data_reg(pfc, i);
+ gpio_setup_data_reg(chip, i);
static int gpio_pin_request(struct gpio_chip *gc, unsigned offset)
{
struct sh_pfc *pfc = gpio_to_pfc(gc);
static int gpio_pin_request(struct gpio_chip *gc, unsigned offset)
{
struct sh_pfc *pfc = gpio_to_pfc(gc);
- struct sh_pfc_pin *pin = sh_pfc_get_pin(pfc, offset);
+ int idx = sh_pfc_get_pin_index(pfc, offset);
- if (pin == NULL || pin->enum_id == 0)
+ if (idx < 0 || pfc->info->pins[idx].enum_id == 0)
return -EINVAL;
return pinctrl_request_gpio(offset);
return -EINVAL;
return pinctrl_request_gpio(offset);
struct gpio_chip *gc = &chip->gpio_chip;
int ret;
struct gpio_chip *gc = &chip->gpio_chip;
int ret;
+ chip->pins = devm_kzalloc(pfc->dev, pfc->nr_pins * sizeof(*chip->pins),
+ GFP_KERNEL);
+ if (chip->pins == NULL)
+ return -ENOMEM;
+
ret = gpio_setup_data_regs(chip);
if (ret < 0)
return ret;
ret = gpio_setup_data_regs(chip);
if (ret < 0)
return ret;
+struct sh_pfc_pin_config {
+ u32 type;
+};
+
struct sh_pfc_pinctrl {
struct pinctrl_dev *pctl;
struct pinctrl_desc pctl_desc;
struct sh_pfc_pinctrl {
struct pinctrl_dev *pctl;
struct pinctrl_desc pctl_desc;
struct sh_pfc *pfc;
struct pinctrl_pin_desc *pins;
struct sh_pfc *pfc;
struct pinctrl_pin_desc *pins;
+ struct sh_pfc_pin_config *configs;
};
static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev)
};
static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev)
spin_unlock_irqrestore(&pfc->lock, flags);
}
spin_unlock_irqrestore(&pfc->lock, flags);
}
-static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
+static int sh_pfc_reconfig_pin(struct sh_pfc_pinctrl *pmx, unsigned offset,
- struct sh_pfc_pin *pin = sh_pfc_get_pin(pfc, offset);
+ struct sh_pfc *pfc = pmx->pfc;
+ int idx = sh_pfc_get_pin_index(pfc, offset);
+ struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
+ struct sh_pfc_pin *pin = &pfc->info->pins[idx];
unsigned int mark = pin->enum_id;
unsigned long flags;
unsigned int mark = pin->enum_id;
unsigned long flags;
int ret = -EINVAL;
spin_lock_irqsave(&pfc->lock, flags);
int ret = -EINVAL;
spin_lock_irqsave(&pfc->lock, flags);
- pinmux_type = pin->flags & PINMUX_FLAG_TYPE;
-
/*
* See if the present config needs to first be de-configured.
*/
/*
* See if the present config needs to first be de-configured.
*/
case PINMUX_TYPE_GPIO:
break;
case PINMUX_TYPE_OUTPUT:
case PINMUX_TYPE_INPUT:
case PINMUX_TYPE_INPUT_PULLUP:
case PINMUX_TYPE_INPUT_PULLDOWN:
case PINMUX_TYPE_GPIO:
break;
case PINMUX_TYPE_OUTPUT:
case PINMUX_TYPE_INPUT:
case PINMUX_TYPE_INPUT_PULLUP:
case PINMUX_TYPE_INPUT_PULLDOWN:
- sh_pfc_config_mux(pfc, mark, pinmux_type, GPIO_CFG_FREE);
+ sh_pfc_config_mux(pfc, mark, cfg->type, GPIO_CFG_FREE);
break;
default:
goto err;
break;
default:
goto err;
if (sh_pfc_config_mux(pfc, mark, new_type, GPIO_CFG_REQ) != 0)
goto err;
if (sh_pfc_config_mux(pfc, mark, new_type, GPIO_CFG_REQ) != 0)
goto err;
- pin->flags &= ~PINMUX_FLAG_TYPE;
- pin->flags |= new_type;
{
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
struct sh_pfc *pfc = pmx->pfc;
{
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
struct sh_pfc *pfc = pmx->pfc;
- struct sh_pfc_pin *pin = sh_pfc_get_pin(pfc, offset);
+ int idx = sh_pfc_get_pin_index(pfc, offset);
+ struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
spin_lock_irqsave(&pfc->lock, flags);
spin_lock_irqsave(&pfc->lock, flags);
- pinmux_type = pin->flags & PINMUX_FLAG_TYPE;
-
- switch (pinmux_type) {
case PINMUX_TYPE_GPIO:
case PINMUX_TYPE_INPUT:
case PINMUX_TYPE_OUTPUT:
break;
case PINMUX_TYPE_FUNCTION:
default:
case PINMUX_TYPE_GPIO:
case PINMUX_TYPE_INPUT:
case PINMUX_TYPE_OUTPUT:
break;
case PINMUX_TYPE_FUNCTION:
default:
- pr_err("Unsupported mux type (%d), bailing...\n", pinmux_type);
+ pr_err("Unsupported mux type (%d), bailing...\n", cfg->type);
ret = -ENOTSUPP;
goto err;
}
ret = -ENOTSUPP;
goto err;
}
{
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
struct sh_pfc *pfc = pmx->pfc;
{
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
struct sh_pfc *pfc = pmx->pfc;
- struct sh_pfc_pin *pin = sh_pfc_get_pin(pfc, offset);
+ int idx = sh_pfc_get_pin_index(pfc, offset);
+ struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
+ struct sh_pfc_pin *pin = &pfc->info->pins[idx];
spin_lock_irqsave(&pfc->lock, flags);
spin_lock_irqsave(&pfc->lock, flags);
- pinmux_type = pin->flags & PINMUX_FLAG_TYPE;
-
- sh_pfc_config_mux(pfc, pin->enum_id, pinmux_type, GPIO_CFG_FREE);
+ sh_pfc_config_mux(pfc, pin->enum_id, cfg->type, GPIO_CFG_FREE);
spin_unlock_irqrestore(&pfc->lock, flags);
}
spin_unlock_irqrestore(&pfc->lock, flags);
}
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
int type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
int type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;
- return sh_pfc_reconfig_pin(pmx->pfc, offset, type);
+ return sh_pfc_reconfig_pin(pmx, offset, type);
}
static const struct pinmux_ops sh_pfc_pinmux_ops = {
}
static const struct pinmux_ops sh_pfc_pinmux_ops = {
{
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
struct sh_pfc *pfc = pmx->pfc;
{
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
struct sh_pfc *pfc = pmx->pfc;
- struct sh_pfc_pin *pin = sh_pfc_get_pin(pfc, _pin);
+ int idx = sh_pfc_get_pin_index(pfc, _pin);
+ struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
- *config = pin->flags & PINMUX_FLAG_TYPE;
if (config >= PINMUX_FLAG_TYPE)
return -EINVAL;
if (config >= PINMUX_FLAG_TYPE)
return -EINVAL;
- return sh_pfc_reconfig_pin(pmx->pfc, pin, config);
+ return sh_pfc_reconfig_pin(pmx, pin, config);
}
static void sh_pfc_pinconf_dbg_show(struct pinctrl_dev *pctldev,
}
static void sh_pfc_pinconf_dbg_show(struct pinctrl_dev *pctldev,
if (unlikely(!pmx->pins))
return -ENOMEM;
if (unlikely(!pmx->pins))
return -ENOMEM;
+ pmx->configs = devm_kzalloc(pfc->dev,
+ sizeof(*pmx->configs) * pfc->info->nr_pins,
+ GFP_KERNEL);
+ if (unlikely(!pmx->configs))
+ return -ENOMEM;
+
for (i = 0, nr_pins = 0; i < nr_ranges; ++i) {
const struct pinmux_range *range = &ranges[i];
unsigned int number;
for (number = range->begin; number <= range->end;
number++, nr_pins++) {
for (i = 0, nr_pins = 0; i < nr_ranges; ++i) {
const struct pinmux_range *range = &ranges[i];
unsigned int number;
for (number = range->begin; number <= range->end;
number++, nr_pins++) {
+ struct sh_pfc_pin_config *cfg = &pmx->configs[nr_pins];
struct pinctrl_pin_desc *pin = &pmx->pins[nr_pins];
struct sh_pfc_pin *info = &pfc->info->pins[nr_pins];
pin->number = number;
pin->name = info->name;
struct pinctrl_pin_desc *pin = &pmx->pins[nr_pins];
struct sh_pfc_pin *info = &pfc->info->pins[nr_pins];
pin->number = number;
pin->name = info->name;
+ cfg->type = PINMUX_TYPE_GPIO;
PINMUX_FLAG_TYPE, /* must be last */
};
PINMUX_FLAG_TYPE, /* must be last */
};
-#define PINMUX_FLAG_DBIT_SHIFT 5
-#define PINMUX_FLAG_DBIT (0x1f << PINMUX_FLAG_DBIT_SHIFT)
-#define PINMUX_FLAG_DREG_SHIFT 10
-#define PINMUX_FLAG_DREG (0x3f << PINMUX_FLAG_DREG_SHIFT)
-
struct sh_pfc_pin {
const pinmux_enum_t enum_id;
struct sh_pfc_pin {
const pinmux_enum_t enum_id;
[gpio] = { \
.name = __stringify(gpio), \
.enum_id = data_or_mark, \
[gpio] = { \
.name = __stringify(gpio), \
.enum_id = data_or_mark, \
- .flags = PINMUX_TYPE_GPIO \
}
#define PINMUX_GPIO_FN(gpio, base, data_or_mark) \
[gpio - (base)] = { \
}
#define PINMUX_GPIO_FN(gpio, base, data_or_mark) \
[gpio - (base)] = { \