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b42ffe6)
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Message-id:
f840042f0e1205041f8feaf0d39ca639884f3a00.
1366945969.git.hutao@cn.fujitsu.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
+static bool has_pvpanic = true;
+
/* PC hardware initialisation */
static void pc_init1(MemoryRegion *system_memory,
MemoryRegion *system_io,
/* PC hardware initialisation */
static void pc_init1(MemoryRegion *system_memory,
MemoryRegion *system_io,
if (pci_enabled) {
pc_pci_device_init(pci_bus);
}
if (pci_enabled) {
pc_pci_device_init(pci_bus);
}
+
+ if (has_pvpanic) {
+ pvpanic_init(isa_bus);
+ }
}
static void pc_init_pci(QEMUMachineInitArgs *args)
}
static void pc_init_pci(QEMUMachineInitArgs *args)
static void pc_init_pci_1_4(QEMUMachineInitArgs *args)
{
pc_sysfw_flash_vs_rom_bug_compatible = true;
static void pc_init_pci_1_4(QEMUMachineInitArgs *args)
{
pc_sysfw_flash_vs_rom_bug_compatible = true;
{
enable_compat_apic_id_mode();
pc_sysfw_flash_vs_rom_bug_compatible = true;
{
enable_compat_apic_id_mode();
pc_sysfw_flash_vs_rom_bug_compatible = true;
disable_kvm_pv_eoi();
enable_compat_apic_id_mode();
pc_sysfw_flash_vs_rom_bug_compatible = true;
disable_kvm_pv_eoi();
enable_compat_apic_id_mode();
pc_sysfw_flash_vs_rom_bug_compatible = true;
{
disable_kvm_pv_eoi();
enable_compat_apic_id_mode();
{
disable_kvm_pv_eoi();
enable_compat_apic_id_mode();
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
const char *boot_device = args->boot_device;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
const char *boot_device = args->boot_device;
disable_kvm_pv_eoi();
enable_compat_apic_id_mode();
pc_init1(get_system_memory(),
disable_kvm_pv_eoi();
enable_compat_apic_id_mode();
pc_init1(get_system_memory(),
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
const char *boot_device = args->boot_device;
const char *kernel_cmdline = args->kernel_cmdline;
const char *initrd_filename = args->initrd_filename;
const char *boot_device = args->boot_device;
if (cpu_model == NULL)
cpu_model = "486";
disable_kvm_pv_eoi();
if (cpu_model == NULL)
cpu_model = "486";
disable_kvm_pv_eoi();
/* ICH9 AHCI has 6 ports */
#define MAX_SATA_PORTS 6
/* ICH9 AHCI has 6 ports */
#define MAX_SATA_PORTS 6
+static bool has_pvpanic = true;
+
/* PC hardware initialisation */
static void pc_q35_init(QEMUMachineInitArgs *args)
{
/* PC hardware initialisation */
static void pc_q35_init(QEMUMachineInitArgs *args)
{
if (pci_enabled) {
pc_pci_device_init(host_bus);
}
if (pci_enabled) {
pc_pci_device_init(host_bus);
}
+
+ if (has_pvpanic) {
+ pvpanic_init(isa_bus);
+ }
}
static void pc_q35_init_1_4(QEMUMachineInitArgs *args)
{
pc_sysfw_flash_vs_rom_bug_compatible = true;
}
static void pc_q35_init_1_4(QEMUMachineInitArgs *args)
{
pc_sysfw_flash_vs_rom_bug_compatible = true;
#include "qemu/log.h"
#include "hw/nvram/fw_cfg.h"
#include "qemu/log.h"
#include "hw/nvram/fw_cfg.h"
/* The bit of supported pv event */
#define PVPANIC_F_PANICKED 0
/* The bit of supported pv event */
#define PVPANIC_F_PANICKED 0
+int pvpanic_init(ISABus *bus)
+{
+ isa_create_simple(bus, TYPE_ISA_PVPANIC_DEVICE);
+ return 0;
+}
+
static Property pvpanic_isa_properties[] = {
DEFINE_PROP_UINT16("ioport", PVPanicState, ioport, 0x505),
DEFINE_PROP_END_OF_LIST(),
static Property pvpanic_isa_properties[] = {
DEFINE_PROP_UINT16("ioport", PVPanicState, ioport, 0x505),
DEFINE_PROP_END_OF_LIST(),
extern bool pc_sysfw_flash_vs_rom_bug_compatible;
void pc_system_firmware_init(MemoryRegion *rom_memory);
extern bool pc_sysfw_flash_vs_rom_bug_compatible;
void pc_system_firmware_init(MemoryRegion *rom_memory);
+/* pvpanic.c */
+int pvpanic_init(ISABus *bus);
+
/* e820 types */
#define E820_RAM 1
#define E820_RESERVED 2
/* e820 types */
#define E820_RAM 1
#define E820_RESERVED 2