See ISA, 4.4.3 for details.
Vector addresses recorded in core configuration are absolute values that
correspond to default VECBASE value.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
INTCLEAR = 227,
INTENABLE = 228,
PS = 230,
INTCLEAR = 227,
INTENABLE = 228,
PS = 230,
EXCCAUSE = 232,
CCOUNT = 234,
PRID = 235,
EXCCAUSE = 232,
CCOUNT = 234,
PRID = 235,
unsigned nareg;
int excm_level;
int ndepc;
unsigned nareg;
int excm_level;
int ndepc;
uint32_t exception_vector[EXC_MAX];
unsigned ninterrupt;
unsigned nlevel;
uint32_t exception_vector[EXC_MAX];
unsigned ninterrupt;
unsigned nlevel;
env->sregs[LITBASE] &= ~1;
env->sregs[PS] = xtensa_option_enabled(env->config,
XTENSA_OPTION_INTERRUPT) ? 0x1f : 0x10;
env->sregs[LITBASE] &= ~1;
env->sregs[PS] = xtensa_option_enabled(env->config,
XTENSA_OPTION_INTERRUPT) ? 0x1f : 0x10;
+ env->sregs[VECBASE] = env->config->vecbase;
env->pending_irq_level = 0;
}
env->pending_irq_level = 0;
}
.nareg = 64,
.ndepc = 1,
.excm_level = 16,
.nareg = 64,
.ndepc = 1,
.excm_level = 16,
.exception_vector = {
[EXC_RESET] = 0x5fff8000,
[EXC_WINDOW_OVERFLOW4] = 0x5fff8400,
.exception_vector = {
[EXC_RESET] = 0x5fff8000,
[EXC_WINDOW_OVERFLOW4] = 0x5fff8400,
+static uint32_t relocated_vector(CPUState *env, uint32_t vector)
+{
+ if (xtensa_option_enabled(env->config,
+ XTENSA_OPTION_RELOCATABLE_VECTOR)) {
+ return vector - env->config->vecbase + env->sregs[VECBASE];
+ } else {
+ return vector;
+ }
+}
+
/*!
* Handle penging IRQ.
* For the high priority interrupt jump to the corresponding interrupt vector.
/*!
* Handle penging IRQ.
* For the high priority interrupt jump to the corresponding interrupt vector.
env->sregs[EPS2 + level - 2] = env->sregs[PS];
env->sregs[PS] =
(env->sregs[PS] & ~PS_INTLEVEL) | level | PS_EXCM;
env->sregs[EPS2 + level - 2] = env->sregs[PS];
env->sregs[PS] =
(env->sregs[PS] & ~PS_INTLEVEL) | level | PS_EXCM;
- env->pc = env->config->interrupt_vector[level];
+ env->pc = relocated_vector(env,
+ env->config->interrupt_vector[level]);
} else {
env->sregs[EXCCAUSE] = LEVEL1_INTERRUPT_CAUSE;
} else {
env->sregs[EXCCAUSE] = LEVEL1_INTERRUPT_CAUSE;
__func__, env->exception_index,
env->pc, env->regs[0], env->sregs[PS], env->sregs[CCOUNT]);
if (env->config->exception_vector[env->exception_index]) {
__func__, env->exception_index,
env->pc, env->regs[0], env->sregs[PS], env->sregs[CCOUNT]);
if (env->config->exception_vector[env->exception_index]) {
- env->pc = env->config->exception_vector[env->exception_index];
+ env->pc = relocated_vector(env,
+ env->config->exception_vector[env->exception_index]);
env->exception_taken = 1;
} else {
qemu_log("%s(pc = %08x) bad exception_index: %d\n",
env->exception_taken = 1;
} else {
qemu_log("%s(pc = %08x) bad exception_index: %d\n",
[INTCLEAR] = "INTCLEAR",
[INTENABLE] = "INTENABLE",
[PS] = "PS",
[INTCLEAR] = "INTCLEAR",
[INTENABLE] = "INTENABLE",
[PS] = "PS",
[EXCCAUSE] = "EXCCAUSE",
[CCOUNT] = "CCOUNT",
[PRID] = "PRID",
[EXCCAUSE] = "EXCCAUSE",
[CCOUNT] = "CCOUNT",
[PRID] = "PRID",