With the ability to remove BTCOEX support at compile time,
these checks are no longer needed.
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
{
u32 payload[4] = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffff00};
{
u32 payload[4] = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffff00};
- if (!ATH9K_HW_CAP_MCI)
- return;
-
ar9003_mci_send_message(ah, MCI_REMOTE_RESET, 0, payload, 16,
wait_done, false);
udelay(5);
ar9003_mci_send_message(ah, MCI_REMOTE_RESET, 0, payload, 16,
wait_done, false);
udelay(5);
{
u32 payload = 0x00000000;
{
u32 payload = 0x00000000;
- if (!ATH9K_HW_CAP_MCI)
- return;
-
ar9003_mci_send_message(ah, MCI_LNA_TRANS, 0, &payload, 1,
wait_done, false);
}
ar9003_mci_send_message(ah, MCI_LNA_TRANS, 0, &payload, 1,
wait_done, false);
}
static void ar9003_mci_send_sys_waking(struct ath_hw *ah, bool wait_done)
{
static void ar9003_mci_send_sys_waking(struct ath_hw *ah, bool wait_done)
{
- if (!ATH9K_HW_CAP_MCI)
- return;
-
ar9003_mci_send_message(ah, MCI_SYS_WAKING, MCI_FLAG_DISABLE_TIMESTAMP,
NULL, 0, wait_done, false);
}
ar9003_mci_send_message(ah, MCI_SYS_WAKING, MCI_FLAG_DISABLE_TIMESTAMP,
NULL, 0, wait_done, false);
}
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
u32 payload[4] = {0, 0, 0, 0};
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
u32 payload[4] = {0, 0, 0, 0};
- if (!ATH9K_HW_CAP_MCI)
- return;
-
ath_dbg(common, MCI, "MCI Send Coex %s BT GPM\n",
(halt) ? "halt" : "unhalt");
ath_dbg(common, MCI, "MCI Send Coex %s BT GPM\n",
(halt) ? "halt" : "unhalt");
static void ar9003_mci_disable_interrupt(struct ath_hw *ah)
{
static void ar9003_mci_disable_interrupt(struct ath_hw *ah)
{
- if (!ATH9K_HW_CAP_MCI)
- return;
-
REG_WRITE(ah, AR_MCI_INTERRUPT_EN, 0);
REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_EN, 0);
}
static void ar9003_mci_enable_interrupt(struct ath_hw *ah)
{
REG_WRITE(ah, AR_MCI_INTERRUPT_EN, 0);
REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_EN, 0);
}
static void ar9003_mci_enable_interrupt(struct ath_hw *ah)
{
- if (!ATH9K_HW_CAP_MCI)
- return;
-
REG_WRITE(ah, AR_MCI_INTERRUPT_EN, AR_MCI_INTERRUPT_DEFAULT);
REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_EN,
AR_MCI_INTERRUPT_RX_MSG_DEFAULT);
REG_WRITE(ah, AR_MCI_INTERRUPT_EN, AR_MCI_INTERRUPT_DEFAULT);
REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_EN,
AR_MCI_INTERRUPT_RX_MSG_DEFAULT);
- if (!ATH9K_HW_CAP_MCI)
- return false;
-
intr = REG_READ(ah, AR_MCI_INTERRUPT_RX_MSG_RAW);
return ((intr & ints) == ints);
}
intr = REG_READ(ah, AR_MCI_INTERRUPT_RX_MSG_RAW);
return ((intr & ints) == ints);
}
{
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
{
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
- if (!ATH9K_HW_CAP_MCI)
- return;
-
*raw_intr = mci->raw_intr;
*rx_msg_intr = mci->rx_msg_intr;
*raw_intr = mci->raw_intr;
*rx_msg_intr = mci->rx_msg_intr;
{
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
{
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
- if (!ATH9K_HW_CAP_MCI)
- return;
-
if (!mci->update_2g5g &&
(mci->is_2g != is_2g))
mci->update_2g5g = true;
if (!mci->update_2g5g &&
(mci->is_2g != is_2g))
mci->update_2g5g = true;
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
u32 cur_bt_state;
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
u32 cur_bt_state;
- if (!ATH9K_HW_CAP_MCI)
- return;
-
cur_bt_state = ar9003_mci_state(ah, MCI_STATE_REMOTE_SLEEP, NULL);
if (mci->bt_state != cur_bt_state) {
cur_bt_state = ar9003_mci_state(ah, MCI_STATE_REMOTE_SLEEP, NULL);
if (mci->bt_state != cur_bt_state) {
u8 recv_type = 0, recv_opcode = 0;
bool b_is_bt_cal_done = (gpm_type == MCI_GPM_BT_CAL_DONE);
u8 recv_type = 0, recv_opcode = 0;
bool b_is_bt_cal_done = (gpm_type == MCI_GPM_BT_CAL_DONE);
- if (!ATH9K_HW_CAP_MCI)
- return 0;
-
more_data = time_out ? MCI_GPM_NOMORE : MCI_GPM_MORE;
while (time_out > 0) {
more_data = time_out ? MCI_GPM_NOMORE : MCI_GPM_MORE;
while (time_out > 0) {
{
struct ath_common *common = ath9k_hw_common(ah);
{
struct ath_common *common = ath9k_hw_common(ah);
- if (!ATH9K_HW_CAP_MCI)
- return;
-
/* disable all MCI messages */
REG_WRITE(ah, AR_MCI_MSG_ATTRIBUTES_TABLE, 0xffff0000);
REG_WRITE(ah, AR_BTCOEX_WL_WEIGHTS0, 0xffffffff);
/* disable all MCI messages */
REG_WRITE(ah, AR_MCI_MSG_ATTRIBUTES_TABLE, 0xffff0000);
REG_WRITE(ah, AR_BTCOEX_WL_WEIGHTS0, 0xffffffff);
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
u32 regval, thresh;
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
u32 regval, thresh;
- if (!ATH9K_HW_CAP_MCI)
- return;
-
ath_dbg(common, MCI, "MCI full_sleep = %d, is_2g = %d\n",
is_full_sleep, is_2g);
ath_dbg(common, MCI, "MCI full_sleep = %d, is_2g = %d\n",
is_full_sleep, is_2g);
struct ath_common *common = ath9k_hw_common(ah);
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
struct ath_common *common = ath9k_hw_common(ah);
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
- if (!ATH9K_HW_CAP_MCI)
- return;
-
if (mci->update_2g5g) {
if (mci->is_2g) {
if (mci->update_2g5g) {
if (mci->is_2g) {
u32 saved_mci_int_en;
int i;
u32 saved_mci_int_en;
int i;
- if (!ATH9K_HW_CAP_MCI)
- return false;
-
saved_mci_int_en = REG_READ(ah, AR_MCI_INTERRUPT_EN);
regval = REG_READ(ah, AR_BTCOEX_CTRL);
saved_mci_int_en = REG_READ(ah, AR_MCI_INTERRUPT_EN);
regval = REG_READ(ah, AR_BTCOEX_CTRL);
{
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
{
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
- if (!ATH9K_HW_CAP_MCI)
- return;
-
mci->gpm_addr = gpm_addr;
mci->gpm_buf = gpm_buf;
mci->gpm_len = len;
mci->gpm_addr = gpm_addr;
mci->gpm_buf = gpm_buf;
mci->gpm_len = len;
void ar9003_mci_cleanup(struct ath_hw *ah)
{
void ar9003_mci_cleanup(struct ath_hw *ah)
{
- if (!ATH9K_HW_CAP_MCI)
- return;
-
/* Turn off MCI and Jupiter mode. */
REG_WRITE(ah, AR_BTCOEX_CTRL, 0x00);
ar9003_mci_disable_interrupt(ah);
/* Turn off MCI and Jupiter mode. */
REG_WRITE(ah, AR_BTCOEX_CTRL, 0x00);
ar9003_mci_disable_interrupt(ah);
u32 value = 0, more_gpm = 0, gpm_ptr;
u8 query_type;
u32 value = 0, more_gpm = 0, gpm_ptr;
u8 query_type;
- if (!ATH9K_HW_CAP_MCI)
- return 0;
-
switch (state_type) {
case MCI_STATE_ENABLE:
if (mci->ready) {
switch (state_type) {
case MCI_STATE_ENABLE:
if (mci->ready) {
if (status & ATH9K_INT_GENTIMER)
ath_gen_timer_isr(sc->sc_ah);
if (status & ATH9K_INT_GENTIMER)
ath_gen_timer_isr(sc->sc_ah);
- if ((status & ATH9K_INT_MCI) && ATH9K_HW_CAP_MCI)
+ if (status & ATH9K_INT_MCI)
ATH9K_HW_CAP_5GHZ = BIT(12),
ATH9K_HW_CAP_APM = BIT(13),
ATH9K_HW_CAP_RTT = BIT(14),
ATH9K_HW_CAP_5GHZ = BIT(12),
ATH9K_HW_CAP_APM = BIT(13),
ATH9K_HW_CAP_RTT = BIT(14),
-#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
ATH9K_HW_CAP_MCI = BIT(15),
ATH9K_HW_CAP_MCI = BIT(15),
-#else
- ATH9K_HW_CAP_MCI = 0,
-#endif
ATH9K_HW_CAP_DFS = BIT(16),
};
ATH9K_HW_CAP_DFS = BIT(16),
};
struct ath_mci_coex *mci = &sc->mci_coex;
struct ath_mci_buf *buf = &mci->sched_buf;
struct ath_mci_coex *mci = &sc->mci_coex;
struct ath_mci_buf *buf = &mci->sched_buf;
- if (!ATH9K_HW_CAP_MCI)
- return 0;
-
buf->bf_addr = dma_alloc_coherent(sc->dev,
ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE,
&buf->bf_paddr, GFP_KERNEL);
buf->bf_addr = dma_alloc_coherent(sc->dev,
ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE,
&buf->bf_paddr, GFP_KERNEL);
struct ath_mci_coex *mci = &sc->mci_coex;
struct ath_mci_buf *buf = &mci->sched_buf;
struct ath_mci_coex *mci = &sc->mci_coex;
struct ath_mci_buf *buf = &mci->sched_buf;
- if (!ATH9K_HW_CAP_MCI)
- return;
-
if (buf->bf_addr)
dma_free_coherent(sc->dev,
ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE,
if (buf->bf_addr)
dma_free_coherent(sc->dev,
ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE,
u32 more_data = MCI_GPM_MORE;
bool skip_gpm = false;
u32 more_data = MCI_GPM_MORE;
bool skip_gpm = false;
- if (!ATH9K_HW_CAP_MCI)
- return;
-
ar9003_mci_get_interrupt(sc->sc_ah, &mci_int, &mci_int_rxmsg);
if (ar9003_mci_state(ah, MCI_STATE_ENABLE, NULL) == 0) {
ar9003_mci_get_interrupt(sc->sc_ah, &mci_int, &mci_int_rxmsg);
if (ar9003_mci_state(ah, MCI_STATE_ENABLE, NULL) == 0) {