CPUArchState is no longer needed.
Move the declaration to include/qemu/cpu.h and add documentation.
Signed-off-by: Andreas Färber <afaerber@suse.de>
#define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
void cpu_single_step(CPUArchState *env, int enabled);
#define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
void cpu_single_step(CPUArchState *env, int enabled);
-void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data);
#if !defined(CONFIG_USER_ONLY)
#if !defined(CONFIG_USER_ONLY)
qemu_thread_get_self(&io_thread);
}
qemu_thread_get_self(&io_thread);
}
-void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data)
+void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data)
- CPUState *cpu = ENV_GET_CPU(env);
struct qemu_work_item wi;
if (qemu_cpu_is_self(cpu)) {
struct qemu_work_item wi;
if (qemu_cpu_is_self(cpu)) {
static void kvm_apic_external_nmi(APICCommonState *s)
{
static void kvm_apic_external_nmi(APICCommonState *s)
{
- run_on_cpu(&s->cpu->env, do_inject_external_nmi, s);
+ run_on_cpu(CPU(s->cpu), do_inject_external_nmi, s);
}
static uint64_t kvm_apic_mem_read(void *opaque, hwaddr addr,
}
static uint64_t kvm_apic_mem_read(void *opaque, hwaddr addr,
VAPICEnableTPRReporting info = {
.enable = enable,
};
VAPICEnableTPRReporting info = {
.enable = enable,
};
CPUX86State *env;
for (env = first_cpu; env != NULL; env = env->next_cpu) {
CPUX86State *env;
for (env = first_cpu; env != NULL; env = env->next_cpu) {
+ cpu = x86_env_get_cpu(env);
info.apic = env->apic_state;
info.apic = env->apic_state;
- run_on_cpu(env, vapic_do_enable_tpr_reporting, &info);
+ run_on_cpu(CPU(cpu), vapic_do_enable_tpr_reporting, &info);
}
if (s->state == VAPIC_ACTIVE) {
if (smp_cpus == 1) {
}
if (s->state == VAPIC_ACTIVE) {
if (smp_cpus == 1) {
- run_on_cpu(first_cpu, do_vapic_enable, s);
+ run_on_cpu(ENV_GET_CPU(first_cpu), do_vapic_enable, s);
} else {
zero = g_malloc0(s->rom_state.vapic_size);
cpu_physical_memory_rw(s->vapic_paddr, zero,
} else {
zero = g_malloc0(s->rom_state.vapic_size);
cpu_physical_memory_rw(s->vapic_paddr, zero,
- run_on_cpu(env, spin_kick, &kick);
+ run_on_cpu(CPU(kick.cpu), spin_kick, &kick);
*/
bool cpu_is_stopped(CPUState *cpu);
*/
bool cpu_is_stopped(CPUState *cpu);
+/**
+ * run_on_cpu:
+ * @cpu: The vCPU to run on.
+ * @func: The function to be executed.
+ * @data: Data to pass to the function.
+ *
+ * Schedules the function @func for execution on the vCPU @cpu.
+ */
+void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
+
void kvm_cpu_synchronize_state(CPUArchState *env)
{
void kvm_cpu_synchronize_state(CPUArchState *env)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
if (!env->kvm_vcpu_dirty) {
if (!env->kvm_vcpu_dirty) {
- run_on_cpu(env, do_kvm_cpu_synchronize_state, env);
+ run_on_cpu(cpu, do_kvm_cpu_synchronize_state, env);
int kvm_update_guest_debug(CPUArchState *env, unsigned long reinject_trap)
{
int kvm_update_guest_debug(CPUArchState *env, unsigned long reinject_trap)
{
+ CPUState *cpu = ENV_GET_CPU(env);
struct kvm_set_guest_debug_data data;
data.dbg.control = reinject_trap;
struct kvm_set_guest_debug_data data;
data.dbg.control = reinject_trap;
kvm_arch_update_guest_debug(env, &data.dbg);
data.env = env;
kvm_arch_update_guest_debug(env, &data.dbg);
data.env = env;
- run_on_cpu(env, kvm_invoke_set_guest_debug, &data);
+ run_on_cpu(cpu, kvm_invoke_set_guest_debug, &data);
- run_on_cpu(cenv, do_inject_x86_mce, ¶ms);
+ run_on_cpu(CPU(cpu), do_inject_x86_mce, ¶ms);
if (flags & MCE_INJECT_BROADCAST) {
params.bank = 1;
params.status = MCI_STATUS_VAL | MCI_STATUS_UC;
if (flags & MCE_INJECT_BROADCAST) {
params.bank = 1;
params.status = MCI_STATUS_VAL | MCI_STATUS_UC;
continue;
}
params.env = env;
continue;
}
params.env = env;
- run_on_cpu(cenv, do_inject_x86_mce, ¶ms);
+ run_on_cpu(CPU(cpu), do_inject_x86_mce, ¶ms);