drm/i915: Only do a chipset flush after a clflush

Now that we skip clflushes more often, return a boolean indicating
whether the clflush was actually performed, and only if it was do the
chipset flush. (Though on most of the architectures where the clflush will
be skipped, the chipset flush is a no-op!)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 34d3f2fae8ac21e7162ea87eeb7d69dc5c9ad5be..1af59d72ddc7821c533392702f7334cd5e8d953f 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1841,7 +1841,7 @@ static inline bool i915_terminally_wedged(struct i915_gpu_error *error)
 }
 
 void i915_gem_reset(struct drm_device *dev);
-void i915_gem_clflush_object(struct drm_i915_gem_object *obj, bool force);
+bool i915_gem_clflush_object(struct drm_i915_gem_object *obj, bool force);
 int __must_check i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj);
 int __must_check i915_gem_init(struct drm_device *dev);
 int __must_check i915_gem_init_hw(struct drm_device *dev);

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 54d76e9392d8825672f232c323682a7cd803b74f..959dffba0f0e0fef46ce3e840378d06a198371a1 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -841,8 +841,8 @@ out:
                 */
                if (!needs_clflush_after &&
                    obj->base.write_domain != I915_GEM_DOMAIN_CPU) {
-                       i915_gem_clflush_object(obj, obj->pin_display);
-                       i915_gem_chipset_flush(dev);
+                       if (i915_gem_clflush_object(obj, obj->pin_display))
+                               i915_gem_chipset_flush(dev);
                }
        }
 
@@ -3224,7 +3224,7 @@ err_unpin:
        return ret;
 }
 
-void
+bool
 i915_gem_clflush_object(struct drm_i915_gem_object *obj,
                        bool force)
 {
@@ -3233,14 +3233,14 @@ i915_gem_clflush_object(struct drm_i915_gem_object *obj,
         * again at bind time.
         */
        if (obj->pages == NULL)
-               return;
+               return false;
 
        /*
         * Stolen memory is always coherent with the GPU as it is explicitly
         * marked as wc by the system, or the system is cache-coherent.
         */
        if (obj->stolen)
-               return;
+               return false;
 
        /* If the GPU is snooping the contents of the CPU cache,
         * we do not need to manually clear the CPU cache lines.  However,
@@ -3251,11 +3251,12 @@ i915_gem_clflush_object(struct drm_i915_gem_object *obj,
         * tracking.
         */
        if (!force && cpu_cache_is_coherent(obj->base.dev, obj->cache_level))
-               return;
+               return false;
 
        trace_i915_gem_object_clflush(obj);
-
        drm_clflush_sg(obj->pages);
+
+       return true;
 }
 
 /** Flushes the GTT write domain for the object if it's dirty. */
@@ -3295,8 +3296,9 @@ i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj,
        if (obj->base.write_domain != I915_GEM_DOMAIN_CPU)
                return;
 
-       i915_gem_clflush_object(obj, force);
-       i915_gem_chipset_flush(obj->base.dev);
+       if (i915_gem_clflush_object(obj, force))
+               i915_gem_chipset_flush(obj->base.dev);
+
        old_write_domain = obj->base.write_domain;
        obj->base.write_domain = 0;
 

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index e999578a021caab3847e8fd24f9196a24f9f72e1..7dcf78cf67815b79eefc91257277f7287d8df479 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -708,6 +708,7 @@ i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
 {
        struct drm_i915_gem_object *obj;
        uint32_t flush_domains = 0;
+       bool flush_chipset = false;
        int ret;
 
        list_for_each_entry(obj, objects, exec_list) {
@@ -716,12 +717,12 @@ i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
                        return ret;
 
                if (obj->base.write_domain & I915_GEM_DOMAIN_CPU)
-                       i915_gem_clflush_object(obj, false);
+                       flush_chipset |= i915_gem_clflush_object(obj, false);
 
                flush_domains |= obj->base.write_domain;
        }
 
-       if (flush_domains & I915_GEM_DOMAIN_CPU)
+       if (flush_chipset)
                i915_gem_chipset_flush(ring->dev);
 
        if (flush_domains & I915_GEM_DOMAIN_GTT)