perf/amd/ibs: Cascade pmu init functions' return value

BugLink: https://bugs.launchpad.net/bugs/1981864
[ Upstream commit 39b2ca75eec8a33e2ffdb8aa0c4840ec3e3b472c ]

IBS pmu initialization code ignores return value provided by
callee functions. Fix it.

Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/20220509044914.1473-2-ravi.bangoria@amd.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
Signed-off-by: Kamal Mostafa <kamal@canonical.com>
Signed-off-by: Stefan Bader <stefan.bader@canonical.com>

diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
index 9739019d4b67afd63c167e6c5df170338708b3ff..367ca899e6e887903b8799f9b808f6869cf99508 100644 (file)
--- a/arch/x86/events/amd/ibs.c
+++ b/arch/x86/events/amd/ibs.c
@@ -759,9 +759,10 @@ static __init int perf_ibs_pmu_init(struct perf_ibs *perf_ibs, char *name)
        return ret;
 }
 
-static __init void perf_event_ibs_init(void)
+static __init int perf_event_ibs_init(void)
 {
        struct attribute **attr = ibs_op_format_attrs;
+       int ret;
 
        /*
         * Some chips fail to reset the fetch count when it is written; instead
@@ -773,7 +774,9 @@ static __init void perf_event_ibs_init(void)
        if (boot_cpu_data.x86 == 0x19 && boot_cpu_data.x86_model < 0x10)
                perf_ibs_fetch.fetch_ignore_if_zero_rip = 1;
 
-       perf_ibs_pmu_init(&perf_ibs_fetch, "ibs_fetch");
+       ret = perf_ibs_pmu_init(&perf_ibs_fetch, "ibs_fetch");
+       if (ret)
+               return ret;
 
        if (ibs_caps & IBS_CAPS_OPCNT) {
                perf_ibs_op.config_mask |= IBS_OP_CNT_CTL;
@@ -786,15 +789,35 @@ static __init void perf_event_ibs_init(void)
                perf_ibs_op.cnt_mask    |= IBS_OP_MAX_CNT_EXT_MASK;
        }
 
-       perf_ibs_pmu_init(&perf_ibs_op, "ibs_op");
+       ret = perf_ibs_pmu_init(&perf_ibs_op, "ibs_op");
+       if (ret)
+               goto err_op;
+
+       ret = register_nmi_handler(NMI_LOCAL, perf_ibs_nmi_handler, 0, "perf_ibs");
+       if (ret)
+               goto err_nmi;
 
-       register_nmi_handler(NMI_LOCAL, perf_ibs_nmi_handler, 0, "perf_ibs");
        pr_info("perf: AMD IBS detected (0x%08x)\n", ibs_caps);
+       return 0;
+
+err_nmi:
+       perf_pmu_unregister(&perf_ibs_op.pmu);
+       free_percpu(perf_ibs_op.pcpu);
+       perf_ibs_op.pcpu = NULL;
+err_op:
+       perf_pmu_unregister(&perf_ibs_fetch.pmu);
+       free_percpu(perf_ibs_fetch.pcpu);
+       perf_ibs_fetch.pcpu = NULL;
+
+       return ret;
 }
 
 #else /* defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_AMD) */
 
-static __init void perf_event_ibs_init(void) { }
+static __init int perf_event_ibs_init(void)
+{
+       return 0;
+}
 
 #endif
 
@@ -1064,9 +1087,7 @@ static __init int amd_ibs_init(void)
                          x86_pmu_amd_ibs_starting_cpu,
                          x86_pmu_amd_ibs_dying_cpu);
 
-       perf_event_ibs_init();
-
-       return 0;
+       return perf_event_ibs_init();
 }
 
 /* Since we need the pci subsystem to init ibs we can't do this earlier: */