clk: rockchip: add sclk_timer5 as critical clock on rk3128

sclk_timer5 is for arm arch counter, so need always on.
but no dts node to handle this clk, so make it as critical clock

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/drivers/clk/rockchip/clk-rk3128.c b/drivers/clk/rockchip/clk-rk3128.c
index ce02d2cff608dcf9c1bc6a0db254cf5a91d9e8fa..5970a50671b9a6638d637f8a017e1cc0cf063e97 100644 (file)
--- a/drivers/clk/rockchip/clk-rk3128.c
+++ b/drivers/clk/rockchip/clk-rk3128.c
@@ -578,6 +578,7 @@ static const char *const rk3128_critical_clocks[] __initconst = {
        "hclk_peri",
        "pclk_peri",
        "pclk_pmu",
+       "sclk_timer5",
 };
 
 static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np)