drm/i915: Check idle to active before processing CSQ

If idle to active bit is set, the rest of the fields
in CSQ are not valid.

Bail out early if this is the case in order to prevent
rest of the loop inspecting stale values.

This was found by Bspec/code inspection. Doesn't seem to fix any of
the known issues.

Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Arun Siluvery <arun.siluvery@linux.intel.com>
[danvet: Add note about how this was found.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 29347e7a9565af669da8cacee76da2829e9f5547..5bc0ce1347cef5d7dd0e1c0397f2eefb4ba4e151 100644 (file)
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -497,6 +497,9 @@ void intel_lrc_irq_handler(struct intel_engine_cs *ring)
                status_id = I915_READ(RING_CONTEXT_STATUS_BUF(ring) +
                                (read_pointer % 6) * 8 + 4);
 
+               if (status & GEN8_CTX_STATUS_IDLE_ACTIVE)
+                       continue;
+
                if (status & GEN8_CTX_STATUS_PREEMPTED) {
                        if (status & GEN8_CTX_STATUS_LITE_RESTORE) {
                                if (execlists_check_remove_request(ring, status_id))