]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/commitdiff
drm/amdgpu: cleanup get_invalidate_req v2
authorChristian König <christian.koenig@amd.com>
Tue, 4 Apr 2017 14:07:45 +0000 (16:07 +0200)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 6 Apr 2017 17:27:18 +0000 (13:27 -0400)
The two hubs are just instances of the same hardware,
so the register bits are identical.

v2: keep the function pointer

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

index 9f244c39b65ae7647ca6a1444b09e9f96c697b6d..e0aee9ca9d4e74e41ada54bf71d052d9b8ed18e6 100644 (file)
@@ -306,6 +306,7 @@ struct amdgpu_gart_funcs {
                                     uint32_t flags);
        /* adjust mc addr in fb for APU case */
        u64 (*adjust_mc_addr)(struct amdgpu_device *adev, u64 addr);
+       uint32_t (*get_invalidate_req)(unsigned int vm_id);
 };
 
 /* provided by the ih block */
@@ -570,7 +571,6 @@ struct amdgpu_vmhub {
        uint32_t        vm_context0_cntl;
        uint32_t        vm_l2_pro_fault_status;
        uint32_t        vm_l2_pro_fault_cntl;
-       uint32_t        (*get_invalidate_req)(unsigned int vm_id);
 };
 
 /*
index 669bb98fc45dd5ed766827c2543ac8d06049359b..4e6702d764e2d3c219ed215c747dbc811d600804 100644 (file)
@@ -3148,6 +3148,7 @@ static void gfx_v9_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
                                        unsigned vm_id, uint64_t pd_addr)
 {
        int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);
+       uint32_t req = ring->adev->gart.gart_funcs->get_invalidate_req(vm_id);
        unsigned eng = ring->idx;
        unsigned i;
 
@@ -3157,7 +3158,6 @@ static void gfx_v9_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
 
        for (i = 0; i < AMDGPU_MAX_VMHUBS; ++i) {
                struct amdgpu_vmhub *hub = &ring->adev->vmhub[i];
-               uint32_t req = hub->get_invalidate_req(vm_id);
 
                gfx_v9_0_write_data_to_reg(ring, usepfp, true,
                                           hub->ctx0_ptb_addr_lo32
index 70c21f9b904b370be8c1d62d4d6ce3e00b076912..005075ff00f704da4d4fe560c595989d4c959e15 100644 (file)
@@ -299,25 +299,6 @@ void gfxhub_v1_0_set_fault_enable_default(struct amdgpu_device *adev,
        WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_L2_PROTECTION_FAULT_CNTL), tmp);
 }
 
-static uint32_t gfxhub_v1_0_get_invalidate_req(unsigned int vm_id)
-{
-       u32 req = 0;
-
-       /* invalidate using legacy mode on vm_id*/
-       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
-                           PER_VMID_INVALIDATE_REQ, 1 << vm_id);
-       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, 0);
-       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PTES, 1);
-       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE0, 1);
-       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE1, 1);
-       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE2, 1);
-       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L1_PTES, 1);
-       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
-                           CLEAR_PROTECTION_FAULT_STATUS_ADDR, 0);
-
-       return req;
-}
-
 static int gfxhub_v1_0_early_init(void *handle)
 {
        return 0;
@@ -350,8 +331,6 @@ static int gfxhub_v1_0_sw_init(void *handle)
        hub->vm_l2_pro_fault_cntl =
                SOC15_REG_OFFSET(GC, 0, mmVM_L2_PROTECTION_FAULT_CNTL);
 
-       hub->get_invalidate_req = gfxhub_v1_0_get_invalidate_req;
-
        return 0;
 }
 
index 7632f4ad7aa9edc0e9a94cf4ce6d4742cf1aae7e..6329be81f260ea18900d83a9ba934673fb361b73 100644 (file)
@@ -173,6 +173,25 @@ static void gmc_v9_0_set_irq_funcs(struct amdgpu_device *adev)
        adev->mc.vm_fault.funcs = &gmc_v9_0_irq_funcs;
 }
 
+static uint32_t gmc_v9_0_get_invalidate_req(unsigned int vm_id)
+{
+       u32 req = 0;
+
+       /* invalidate using legacy mode on vm_id*/
+       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
+                           PER_VMID_INVALIDATE_REQ, 1 << vm_id);
+       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, 0);
+       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PTES, 1);
+       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE0, 1);
+       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE1, 1);
+       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE2, 1);
+       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L1_PTES, 1);
+       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
+                           CLEAR_PROTECTION_FAULT_STATUS_ADDR, 0);
+
+       return req;
+}
+
 /*
  * GART
  * VMID 0 is the physical GPU addresses as used by the kernel.
@@ -202,7 +221,7 @@ static void gmc_v9_0_gart_flush_gpu_tlb(struct amdgpu_device *adev,
 
        for (i = 0; i < AMDGPU_MAX_VMHUBS; ++i) {
                struct amdgpu_vmhub *hub = &adev->vmhub[i];
-               u32 tmp = hub->get_invalidate_req(vmid);
+               u32 tmp = gmc_v9_0_get_invalidate_req(vmid);
 
                WREG32_NO_KIQ(hub->vm_inv_eng0_req + eng, tmp);
 
@@ -345,6 +364,7 @@ static const struct amdgpu_gart_funcs gmc_v9_0_gart_funcs = {
        .set_pte_pde = gmc_v9_0_gart_set_pte_pde,
        .get_vm_pte_flags = gmc_v9_0_get_vm_pte_flags,
        .adjust_mc_addr = gmc_v9_0_adjust_mc_addr,
+       .get_invalidate_req = gmc_v9_0_get_invalidate_req,
 };
 
 static void gmc_v9_0_set_gart_funcs(struct amdgpu_device *adev)
index 3c9e27effc6a875df797d22b5c00344068c7eb4a..62684510ddcdb579629ab707b2f098cc788810f1 100644 (file)
@@ -317,25 +317,6 @@ void mmhub_v1_0_set_fault_enable_default(struct amdgpu_device *adev, bool value)
        WREG32(SOC15_REG_OFFSET(MMHUB, 0, mmVM_L2_PROTECTION_FAULT_CNTL), tmp);
 }
 
-static uint32_t mmhub_v1_0_get_invalidate_req(unsigned int vm_id)
-{
-       u32 req = 0;
-
-       /* invalidate using legacy mode on vm_id*/
-       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
-                           PER_VMID_INVALIDATE_REQ, 1 << vm_id);
-       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, 0);
-       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PTES, 1);
-       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE0, 1);
-       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE1, 1);
-       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE2, 1);
-       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L1_PTES, 1);
-       req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,
-                           CLEAR_PROTECTION_FAULT_STATUS_ADDR, 0);
-
-       return req;
-}
-
 static int mmhub_v1_0_early_init(void *handle)
 {
        return 0;
@@ -368,8 +349,6 @@ static int mmhub_v1_0_sw_init(void *handle)
        hub->vm_l2_pro_fault_cntl =
                SOC15_REG_OFFSET(MMHUB, 0, mmVM_L2_PROTECTION_FAULT_CNTL);
 
-       hub->get_invalidate_req = mmhub_v1_0_get_invalidate_req;
-
        return 0;
 }
 
index 2dd2b20d727eeff86738e4cb1a83ef2d06ef951f..21f38d8823353cae261e72c1b8d73289c67ad552 100644 (file)
@@ -1039,6 +1039,7 @@ static void sdma_v4_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring)
 static void sdma_v4_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
                                         unsigned vm_id, uint64_t pd_addr)
 {
+       uint32_t req = ring->adev->gart.gart_funcs->get_invalidate_req(vm_id);
        unsigned eng = ring->idx;
        unsigned i;
 
@@ -1048,7 +1049,6 @@ static void sdma_v4_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
 
        for (i = 0; i < AMDGPU_MAX_VMHUBS; ++i) {
                struct amdgpu_vmhub *hub = &ring->adev->vmhub[i];
-               uint32_t req = hub->get_invalidate_req(vm_id);
 
                amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_SRBM_WRITE) |
                                  SDMA_PKT_SRBM_WRITE_HEADER_BYTE_EN(0xf));
index 8a9a90b00c935d1803e61fee25e89185e9484a7c..9bcf014692820f1e6c78f507f1a8661fa2271bee 100644 (file)
@@ -1034,6 +1034,7 @@ static void uvd_v7_0_vm_reg_wait(struct amdgpu_ring *ring,
 static void uvd_v7_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
                                        unsigned vm_id, uint64_t pd_addr)
 {
+       uint32_t req = ring->adev->gart.gart_funcs->get_invalidate_req(vm_id);
        uint32_t data0, data1, mask;
        unsigned eng = ring->idx;
        unsigned i;
@@ -1044,7 +1045,6 @@ static void uvd_v7_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
 
        for (i = 0; i < AMDGPU_MAX_VMHUBS; ++i) {
                struct amdgpu_vmhub *hub = &ring->adev->vmhub[i];
-               uint32_t req = hub->get_invalidate_req(vm_id);
 
                data0 = (hub->ctx0_ptb_addr_hi32 + vm_id * 2) << 2;
                data1 = upper_32_bits(pd_addr);
@@ -1080,6 +1080,7 @@ static void uvd_v7_0_enc_ring_insert_end(struct amdgpu_ring *ring)
 static void uvd_v7_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,
                         unsigned int vm_id, uint64_t pd_addr)
 {
+       uint32_t req = ring->adev->gart.gart_funcs->get_invalidate_req(vm_id);
        unsigned eng = ring->idx;
        unsigned i;
 
@@ -1089,7 +1090,6 @@ static void uvd_v7_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,
 
        for (i = 0; i < AMDGPU_MAX_VMHUBS; ++i) {
                struct amdgpu_vmhub *hub = &ring->adev->vmhub[i];
-               uint32_t req = hub->get_invalidate_req(vm_id);
 
                amdgpu_ring_write(ring, HEVC_ENC_CMD_REG_WRITE);
                amdgpu_ring_write(ring,
index 2a3db99fbf1ee1f16ed262c134579930c560ab13..edde5fe938d6b5876927b55e9b77c4c58eeabba4 100644 (file)
@@ -973,6 +973,7 @@ static void vce_v4_0_ring_insert_end(struct amdgpu_ring *ring)
 static void vce_v4_0_emit_vm_flush(struct amdgpu_ring *ring,
                         unsigned int vm_id, uint64_t pd_addr)
 {
+       uint32_t req = ring->adev->gart.gart_funcs->get_invalidate_req(vm_id);
        unsigned eng = ring->idx;
        unsigned i;
 
@@ -982,7 +983,6 @@ static void vce_v4_0_emit_vm_flush(struct amdgpu_ring *ring,
 
        for (i = 0; i < AMDGPU_MAX_VMHUBS; ++i) {
                struct amdgpu_vmhub *hub = &ring->adev->vmhub[i];
-               uint32_t req = hub->get_invalidate_req(vm_id);
 
                amdgpu_ring_write(ring, VCE_CMD_REG_WRITE);
                amdgpu_ring_write(ring,