DT: arm64: add iommu dtsi files

Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Conflicts:
	arch/arm64/boot/dts/qcom/msm8916.dtsi

diff --git a/arch/arm64/boot/dts/qcom/msm-iommu-v2.dtsi b/arch/arm64/boot/dts/qcom/msm-iommu-v2.dtsi
new file mode 100644 (file)
index 0000000..6f73eb2
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm-iommu-v2.dtsi
@@ -0,0 +1,238 @@
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+&soc {
+       gfx_iommu: qcom,iommu@1f00000 {
+               compatible = "qcom,msm-smmu-v2", "qcom,msm-mmu-500";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+               reg = <0x1f00000 0x10000>;
+               reg-names = "iommu_base";
+               interrupts = <0 43 0>, <0 42 0>;
+               interrupt-names = "global_cfg_NS_irq", "global_cfg_S_irq";
+               label = "gfx_iommu";
+               qcom,iommu-secure-id = <18>;
+               clocks = <&gcc GCC_SMMU_CFG_CLK>,
+                        <&gcc GCC_GFX_TCU_CLK>;
+               clock-names = "iface_clk", "core_clk";
+               status = "disabled";
+
+               qcom,iommu-ctx@1f09000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       reg = <0x1f09000 0x1000>;
+                       interrupts = <0 241 0>;
+                       qcom,iommu-ctx-sids = <0>;
+                       label = "gfx3d_user";
+               };
+
+               qcom,iommu-ctx@1f0a000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       reg = <0x1f0a000 0x1000>;
+                       interrupts = <0 242 0>;
+                       qcom,iommu-ctx-sids = <1>;
+                       label = "gfx3d_priv";
+               };
+       };
+
+       apps_iommu: qcom,iommu@1e00000 {
+               compatible = "qcom,msm-smmu-v2", "qcom,msm-mmu-500";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+               reg = <0x1e00000 0x40000
+                       0x1ef0000 0x3000>;
+               reg-names = "iommu_base", "smmu_local_base";
+               interrupts = <0 43 0>, <0 42 0>;
+               interrupt-names = "global_cfg_NS_irq", "global_cfg_S_irq";
+               label = "apps_iommu";
+               qcom,iommu-secure-id = <17>;
+               clocks = <&gcc GCC_SMMU_CFG_CLK>,
+                        <&gcc GCC_APSS_TCU_CLK>;
+               clock-names = "iface_clk", "core_clk";
+               qcom,cb-base-offset = <0x20000>;
+               status = "disabled";
+
+               qcom,iommu-ctx@1e22000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       reg = <0x1e22000 0x1000>;
+                       interrupts = <0 70 0>;
+                       qcom,iommu-ctx-sids = <0x2000>;
+                       label = "jpeg_enc0";
+               };
+
+               qcom,iommu-ctx@1e23000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       reg = <0x1e23000 0x1000>;
+                       interrupts = <0 70 0>;
+                       qcom,iommu-ctx-sids = <0x400>;
+                       label = "vfe";
+               };
+
+               qcom,iommu-ctx@1e24000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       reg = <0x1e24000 0x1000>;
+                       interrupts = <0 70 0>;
+                       qcom,iommu-ctx-sids = <0xc00>;
+                       label = "mdp_0";
+               };
+
+               venus_ns: qcom,iommu-ctx@1e25000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       reg = <0x1e25000 0x1000>;
+                       interrupts = <0 70 0>;
+                       qcom,iommu-ctx-sids = <0x800 0x801 0x802 0x803
+                                               0x804 0x805 0x807>;
+                       label = "venus_ns";
+               };
+
+               qcom,iommu-ctx@1e26000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       reg = <0x1e26000 0x1000>;
+                       interrupts = <0 70 0>;
+                       qcom,iommu-ctx-sids = <0x402>;
+                       label = "cpp";
+               };
+
+               qcom,iommu-ctx@1e27000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       reg = <0x1e27000 0x1000>;
+                       interrupts = <0 70 0>;
+                       qcom,iommu-ctx-sids = <0x1000>;
+                       label = "mDSP";
+               };
+
+               qcom,iommu-ctx@1e28000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       reg = <0x1e28000 0x1000>;
+                       interrupts = <0 70 0>;
+                       qcom,iommu-ctx-sids = <0x1400>;
+                       label = "gss";
+               };
+
+               qcom,iommu-ctx@1e29000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       reg = <0x1e29000 0x1000>;
+                       interrupts = <0 70 0>;
+                       qcom,iommu-ctx-sids = <0x1800>;
+                       label = "a2";
+               };
+
+               qcom,iommu-ctx@1e32000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       qcom,secure-context;
+                       reg = <0x1e32000 0x1000>;
+                       interrupts = <0 70 0>, <0 70 0>;
+                       qcom,iommu-ctx-sids = <0xc01>;
+                       label = "mdp_1";
+               };
+
+               venus_sec_pixel: qcom,iommu-ctx@1e33000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       qcom,secure-context;
+                       reg = <0x1e33000 0x1000>;
+                       interrupts = <0 70 0>, <0 70 0>;
+                       qcom,iommu-ctx-sids = <0x885>;
+                       label = "venus_sec_pixel";
+               };
+
+               venus_sec_bitstream: qcom,iommu-ctx@1e34000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       qcom,secure-context;
+                       reg = <0x1e34000 0x1000>;
+                       interrupts = <0 70 0>, <0 70 0>;
+                       qcom,iommu-ctx-sids = <0x880 0x881 0x882 0x883 0x884>;
+                       label = "venus_sec_bitstream";
+               };
+
+               venus_sec_non_pixel: qcom,iommu-ctx@1e35000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       qcom,secure-context;
+                       reg = <0x1e35000 0x1000>;
+                       interrupts = <0 70 0>, <0 70 0>;
+                       qcom,iommu-ctx-sids = <0x887 0x8a0>;
+                       label = "venus_sec_non_pixel";
+               };
+
+               venus_fw: qcom,iommu-ctx@1e36000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       qcom,secure-context;
+                       reg = <0x1e36000 0x1000>;
+                       interrupts = <0 70 0>, <0 70 0>;
+                       qcom,iommu-ctx-sids = <0x8c0 0x8c6>;
+                       label = "venus_fw";
+               };
+
+               periph_rpm: qcom,iommu-ctx@1e37000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       qcom,secure-context;
+                       reg = <0x1e37000 0x1000>;
+                       interrupts = <0 70 0>, <0 70 0>;
+                       qcom,iommu-ctx-sids = <0x40>;
+                       label = "periph_rpm";
+               };
+
+               qcom,iommu-ctx@1e38000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       reg = <0x1e38000 0x1000>;
+                       interrupts = <0 70 0>;
+                       qcom,iommu-ctx-sids = <0xC0 0xC4 0xC8 0xCC 0xD0 0xD3
+                                               0xD4 0xD7 0xD8 0xDB 0xDC 0xDF
+                                               0xF0 0xF3 0xF4 0xF7 0xF8 0xFB
+                                               0xFC 0xFF>;
+                       label = "periph_CE";
+               };
+
+               qcom,iommu-ctx@1e39000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       reg = <0x1e39000 0x1000>;
+                       interrupts = <0 70 0>;
+                       qcom,iommu-ctx-sids = <0x280 0x283 0x284 0x287 0x288
+                                               0x28B 0x28C 0x28F 0x290 0x293
+                                               0x294 0x297 0x298 0x29B 0x29C
+                                               0x29F>;
+                       label = "periph_BLSP";
+               };
+
+               qcom,iommu-ctx@1e3a000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       reg = <0x1e3a000 0x1000>;
+                       interrupts = <0 70 0>;
+                       qcom,iommu-ctx-sids = <0x100>;
+                       label = "periph_SDC1";
+               };
+
+               qcom,iommu-ctx@1e3b000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       reg = <0x1e3b000 0x1000>;
+                       interrupts = <0 70 0>;
+                       qcom,iommu-ctx-sids = <0x140>;
+                       label = "periph_SDC2";
+               };
+
+               qcom,iommu-ctx@1e3c000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       reg = <0x1e3c000 0x1000>;
+                       interrupts = <0 70 0>;
+                       qcom,iommu-ctx-sids = <0x1c0>;
+                       label = "periph_audio";
+               };
+
+               qcom,iommu-ctx@1e3d000 {
+                       compatible = "qcom,msm-smmu-v2-ctx";
+                       reg = <0x1e3d000 0x1000>;
+                       interrupts = <0 70 0>;
+                       qcom,iommu-ctx-sids = <0x2c0>;
+                       label = "periph_USB_HS1";
+               };
+       };
+};

diff --git a/arch/arm64/boot/dts/qcom/msm8916-iommu.dtsi b/arch/arm64/boot/dts/qcom/msm8916-iommu.dtsi
new file mode 100644 (file)
index 0000000..82acb8d
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm8916-iommu.dtsi
@@ -0,0 +1,21 @@
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "msm-iommu-v2.dtsi"
+
+&gfx_iommu {
+       status = "ok";
+};
+
+&apps_iommu {
+       status = "ok";
+};

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 2da30050ee8182d9d7e9ca467f814583dcc57afd..4d754993f6a3f45bc40381f3de61d67d01a41ca0 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -792,3 +792,4 @@
 };
 
 #include "msm8916-pins.dtsi"
+#include "msm8916-iommu.dtsi"