drm/amd/display: Use macro for invalid OPP ID

[WHY]
This is meant to make it clearer that 0xf is not a valid OPP ID, and
that code making use of OPP IDs should not accept this value.

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
index 3f9ad09769b18c003d492e179847659a600f7df7..a48d314011a98706826abad104e972d3c543127f 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
@@ -63,7 +63,7 @@ void hubp1_set_blank(struct hubp *hubp, bool blank)
                }
 
                hubp->mpcc_id = 0xf;
-               hubp->opp_id = 0xf;
+               hubp->opp_id = OPP_ID_INVALID;
        }
 }
 
@@ -1253,7 +1253,7 @@ void dcn10_hubp_construct(
        hubp1->hubp_shift = hubp_shift;
        hubp1->hubp_mask = hubp_mask;
        hubp1->base.inst = inst;
-       hubp1->base.opp_id = 0xf;
+       hubp1->base.opp_id = OPP_ID_INVALID;
        hubp1->base.mpcc_id = 0xf;
 }
 

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 9d2437fb90a6abbc1440ae988616169eb618bb38..8ad49978805106ea4ed8c5b42dc4ea89bfa7d4e1 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -1086,7 +1086,7 @@ static void dcn10_init_pipes(struct dc *dc, struct dc_state *context)
                pipe_ctx->plane_res.dpp = dpp;
                pipe_ctx->plane_res.mpcc_inst = dpp->inst;
                hubp->mpcc_id = dpp->inst;
-               hubp->opp_id = 0xf;
+               hubp->opp_id = OPP_ID_INVALID;
                hubp->power_gated = false;
 
                dc->res_pool->opps[i]->mpc_tree_params.opp_id = dc->res_pool->opps[i]->inst;
@@ -2437,7 +2437,7 @@ static void dcn10_apply_ctx_for_surface(
                if (pipe_ctx->plane_state && !old_pipe_ctx->plane_state) {
                        if (old_pipe_ctx->stream_res.tg == tg &&
                            old_pipe_ctx->plane_res.hubp &&
-                           old_pipe_ctx->plane_res.hubp->opp_id != 0xf)
+                           old_pipe_ctx->plane_res.hubp->opp_id != OPP_ID_INVALID)
                                dcn10_disable_plane(dc, old_pipe_ctx);
                }
 

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c
index 82738f126517d6373ebb498975cb43133361bb0e..dcba2c5326b2fee5fdfddd3109a3658ba4f465b8 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c
@@ -694,7 +694,7 @@ bool hubp2_construct(
        hubp2->hubp_shift = hubp_shift;
        hubp2->hubp_mask = hubp_mask;
        hubp2->base.inst = inst;
-       hubp2->base.opp_id = 0xf;
+       hubp2->base.opp_id = OPP_ID_INVALID;
        hubp2->base.mpcc_id = 0xf;
 
        return true;

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index 2cbffe2809b63d9dd07830e442abf254d40e5230..d55b15fbfe99871edad5432876a6e2e0e8ec6d6d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -605,7 +605,7 @@ static void dcn20_init_hw(struct dc *dc)
                pipe_ctx->plane_res.dpp = dpp;
                pipe_ctx->plane_res.mpcc_inst = dpp->inst;
                hubp->mpcc_id = dpp->inst;
-               hubp->opp_id = 0xf;
+               hubp->opp_id = OPP_ID_INVALID;
                hubp->power_gated = false;
                pipe_ctx->stream_res.opp = NULL;
 
@@ -1307,7 +1307,7 @@ static void dcn20_apply_ctx_for_surface(
                if (pipe_ctx->plane_state && !old_pipe_ctx->plane_state) {
                        if (old_pipe_ctx->stream_res.tg == tg &&
                            old_pipe_ctx->plane_res.hubp &&
-                           old_pipe_ctx->plane_res.hubp->opp_id != 0xf)
+                           old_pipe_ctx->plane_res.hubp->opp_id != OPP_ID_INVALID)
                                dcn20_disable_plane(dc, old_pipe_ctx);
                }
 

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
index fa98c96d0046a9ae4ea2e2f891bf574cf28e450d..342477822dc0c2098bab1b23ea7262db0a04679a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
@@ -28,6 +28,8 @@
 
 #include "mem_input.h"
 
+#define OPP_ID_INVALID 0xf
+
 
 enum cursor_pitch {
        CURSOR_PITCH_64_PIXELS = 0,