arm64: alternatives: ensure secondary CPUs execute ISB after patching

In order to guarantee that the patched instruction stream is visible to
a CPU, that CPU must execute an isb instruction after any related cache
maintenance has completed.

The instruction patching routines in kernel/insn.c get this right for
things like jump labels and ftrace, but the alternatives patching omits
it entirely leaving secondary cores in a potential limbo between the old
and the new code.

This patch adds an isb following the secondary polling loop in the
altenatives patching.

Signed-off-by: Will Deacon <will.deacon@arm.com>

diff --git a/arch/arm64/kernel/alternative.c b/arch/arm64/kernel/alternative.c
index fa1d575ab2c2f5b59cbc616093b95dffe3cea9af..ab9db0e9818c0caa52aa040b7c01aa83183d774e 100644 (file)
--- a/arch/arm64/kernel/alternative.c
+++ b/arch/arm64/kernel/alternative.c
@@ -132,6 +132,7 @@ static int __apply_alternatives_multi_stop(void *unused)
        if (smp_processor_id()) {
                while (!READ_ONCE(patched))
                        cpu_relax();
+               isb();
        } else {
                BUG_ON(patched);
                __apply_alternatives(&region);