microblaze: Use MICROBLAZE_TLB_SIZE in asm code

TLB size was hardcoded in asm code. This patch brings ability
to change TLB size only in one place. (mmu.h).

Signed-off-by: Michal Simek <monstr@monstr.eu>

diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S
index e397d5d525718e0f84b9d62e0e6004c259f8047e..ba2c0333c6bbbf8545b83c0fbf68a930cd83ae13 100644 (file)
--- a/arch/microblaze/kernel/head.S
+++ b/arch/microblaze/kernel/head.S
@@ -134,7 +134,7 @@ _copy_bram:
         * virtual to physical.
         */
        nop
-       addik   r3, r0, 63              /* Invalidate all TLB entries */
+       addik   r3, r0, MICROBLAZE_TLB_SIZE -1  /* Invalidate all TLB entries */
 _invalidate:
        mts     rtlbx, r3
        mts     rtlbhi, r0                      /* flush: ensure V is clear   */

diff --git a/arch/microblaze/kernel/misc.S b/arch/microblaze/kernel/misc.S
index 18681eed5ec758e505f06f2210133275f04ae88e..7cf86498326cc4eafc0db81a8de13ff06bc654bc 100644 (file)
--- a/arch/microblaze/kernel/misc.S
+++ b/arch/microblaze/kernel/misc.S
@@ -29,7 +29,7 @@
 .type  _tlbia, @function
 .align 4;
 _tlbia:
-       addik   r12, r0, 63 /* flush all entries (63 - 3) */
+       addik   r12, r0, MICROBLAZE_TLB_SIZE - 1 /* flush all entries (63 - 3) */
        /* isync */
 _tlbia_1:
        mts     rtlbx, r12
@@ -75,7 +75,7 @@ early_console_reg_tlb_alloc:
         * Load a TLB entry for the UART, so that microblaze_progress() can use
         * the UARTs nice and early.  We use a 4k real==virtual mapping.
         */
-       ori     r4, r0, 63
+       ori     r4, r0, MICROBLAZE_TLB_SIZE - 1
        mts     rtlbx, r4 /* TLB slot 2 */
 
        or      r4,r5,r0