drm/amd/display: Add DSC force disable to dsc_clock_en debugfs entry

[why]
For debug purposes we want not to enable DSC on certain connectors
even if algorithm deesires to do so, instead it should enable DSC
on other capable connectors or fail the atomic check.

[how]
Adding the third option to connector's debugfs entry dsc_clock_en.

Accepted inputs:
     0x0 - connector is using default DSC enablement policy
     0x1 - force enable DSC on the connector, if it supports DSC
     0x2 - force disable DSC on the connector, if DSC is supported

Ex. # echo 0x2 > /sys/kernel/debug/dri/0/DP-1/dsc_clock_en

Signed-off-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 1fdc92a2c0c0b185b601f0a37de85dcce817e776..4684820e4dc8dcc3b838c00955325ec682167e5a 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4685,9 +4685,10 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector,
                                                             dc_link_get_link_cap(aconnector->dc_link));
 
 #if defined(CONFIG_DRM_AMD_DC_DCN)
-               if (dsc_caps.is_dsc_supported) {
+               if (aconnector->dsc_settings.dsc_force_enable != DSC_CLK_FORCE_DISABLE && dsc_caps.is_dsc_supported) {
                        /* Set DSC policy according to dsc_clock_en */
-                       dc_dsc_policy_set_enable_dsc_when_not_needed(aconnector->dsc_settings.dsc_clock_en);
+                       dc_dsc_policy_set_enable_dsc_when_not_needed(
+                               aconnector->dsc_settings.dsc_force_enable == DSC_CLK_FORCE_ENABLE);
 
                        if (dc_dsc_compute_config(aconnector->dc_link->ctx->dc->res_pool->dscs[0],
                                                  &dsc_caps,
@@ -4697,7 +4698,7 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector,
                                                  &stream->timing.dsc_cfg))
                                stream->timing.flags.DSC = 1;
                        /* Overwrite the stream flag if DSC is enabled through debugfs */
-                       if (aconnector->dsc_settings.dsc_clock_en)
+                       if (aconnector->dsc_settings.dsc_force_enable == DSC_CLK_FORCE_ENABLE)
                                stream->timing.flags.DSC = 1;
 
                        if (stream->timing.flags.DSC && aconnector->dsc_settings.dsc_slice_width)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index 71a81cabd6eb045485163174783ea65e80236695..ec8bd5fc8776cb5a550f06d9e16551fb8a368300 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -340,11 +340,17 @@ struct amdgpu_display_manager {
         * fake encoders used for DP MST.
         */
        struct amdgpu_encoder mst_encoders[AMDGPU_DM_MAX_CRTC];
-        bool force_timing_sync;
+       bool force_timing_sync;
+};
+
+enum dsc_clock_force_state {
+       DSC_CLK_FORCE_DEFAULT = 0,
+       DSC_CLK_FORCE_ENABLE,
+       DSC_CLK_FORCE_DISABLE,
 };
 
 struct dsc_preferred_settings {
-       bool dsc_clock_en;
+       enum dsc_clock_force_state dsc_force_enable;
        uint32_t dsc_slice_width;
        uint32_t dsc_slice_height;
        uint32_t dsc_bits_per_pixel;

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
index 94fcb086154c958e298cbc4910a23a62ac809691..5cf3ba3ec5dab9e82125c03c120702dd6adcb6d3 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
@@ -111,7 +111,6 @@ static int parse_write_buffer_into_params(char *wr_buf, uint32_t wr_buf_size,
 
        if (*param_nums > max_param_num)
                *param_nums = max_param_num;
-;
 
        wr_buf_ptr = wr_buf; /* reset buf pointer */
        wr_buf_count = 0; /* number of char already checked */
@@ -1200,9 +1199,14 @@ static ssize_t dp_dsc_clock_en_read(struct file *f, char __user *buf,
  *
  * The write function: dp_dsc_clock_en_write
  * enables to force DSC on the connector.
- * User can write to either force enable DSC
+ * User can write to either force enable or force disable DSC
  * on the next modeset or set it to driver default
  *
+ * Accepted inputs:
+ * 0 - default DSC enablement policy
+ * 1 - force enable DSC on the connector
+ * 2 - force disable DSC on the connector (might cause fail in atomic_check)
+ *
  * Writing DSC settings is done with the following command:
  * - To force enable DSC (you need to specify
  * connector like DP-1):
@@ -1262,7 +1266,12 @@ static ssize_t dp_dsc_clock_en_write(struct file *f, const char __user *buf,
        if (!pipe_ctx || !pipe_ctx->stream)
                goto done;
 
-       aconnector->dsc_settings.dsc_clock_en = param[0];
+       if (param[0] == 1)
+               aconnector->dsc_settings.dsc_force_enable = DSC_CLK_FORCE_ENABLE;
+       else if (param[0] == 2)
+               aconnector->dsc_settings.dsc_force_enable = DSC_CLK_FORCE_DISABLE;
+       else
+               aconnector->dsc_settings.dsc_force_enable = DSC_CLK_FORCE_DEFAULT;
 
 done:
        kfree(wr_buf);

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index adbb44822e9449626ae120c4364497d5f8646694..14c04c1ac9bb30e0ebd06c562f38c54bde00c727 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -453,7 +453,7 @@ struct dsc_mst_fairness_params {
        struct dc_dsc_bw_range bw_range;
        bool compression_possible;
        struct drm_dp_mst_port *port;
-       bool clock_overwrite;
+       enum dsc_clock_force_state clock_force_enable;
        uint32_t slice_width_overwrite;
        uint32_t slice_height_overwrite;
        uint32_t bpp_overwrite;
@@ -638,7 +638,7 @@ static void try_disable_dsc(struct drm_atomic_state *state,
        for (i = 0; i < count; i++) {
                if (vars[i].dsc_enabled
                                && vars[i].bpp_x16 == params[i].bw_range.max_target_bpp_x16
-                               && !params[i].clock_overwrite) {
+                               && !params[i].clock_force_enable == DSC_CLK_FORCE_DEFAULT) {
                        kbps_increase[i] = params[i].bw_range.stream_kbps - params[i].bw_range.max_kbps;
                        tried[i] = false;
                        remaining_to_try += 1;
@@ -718,8 +718,8 @@ static bool compute_mst_dsc_configs_for_link(struct drm_atomic_state *state,
                params[count].sink = stream->sink;
                aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;
                params[count].port = aconnector->port;
-               params[count].clock_overwrite = aconnector->dsc_settings.dsc_clock_en;
-               if (params[count].clock_overwrite)
+               params[count].clock_force_enable = aconnector->dsc_settings.dsc_force_enable;
+               if (params[count].clock_force_enable == DSC_CLK_FORCE_ENABLE)
                        debugfs_overwrite = true;
                params[count].slice_width_overwrite = aconnector->dsc_settings.dsc_slice_width;
                params[count].slice_height_overwrite = aconnector->dsc_settings.dsc_slice_height;
@@ -756,7 +756,7 @@ static bool compute_mst_dsc_configs_for_link(struct drm_atomic_state *state,
 
        /* Try max compression */
        for (i = 0; i < count; i++) {
-               if (params[i].compression_possible) {
+               if (params[i].compression_possible && params[i].clock_force_enable != DSC_CLK_FORCE_DISABLE) {
                        vars[i].pbn = kbps_to_peak_pbn(params[i].bw_range.min_kbps);
                        vars[i].dsc_enabled = true;
                        vars[i].bpp_x16 = params[i].bw_range.min_target_bpp_x16;