"%sport 0x%x-0x%x, align 0x%x, size 0x%x, %i-bit address decoding\n",
space, port->min, port->max,
port->align ? (port->align - 1) : 0, port->size,
- port->flags & PNP_PORT_FLAG_16BITADDR ? 16 : 10);
+ port->flags & IORESOURCE_IO_16BIT_ADDR ? 16 : 10);
}
static void pnp_print_irq(pnp_info_buffer_t * buffer, char *space,
port->max = (tmp[4] << 8) | tmp[3];
port->align = tmp[5];
port->size = tmp[6];
- port->flags = tmp[0] ? PNP_PORT_FLAG_16BITADDR : 0;
+ port->flags = tmp[0] ? IORESOURCE_IO_16BIT_ADDR : 0;
pnp_register_port_resource(dev, option, port);
}
port->min = port->max = (tmp[1] << 8) | tmp[0];
port->size = tmp[2];
port->align = 0;
- port->flags = PNP_PORT_FLAG_FIXED;
+ port->flags = IORESOURCE_IO_FIXED;
pnp_register_port_resource(dev, option, port);
}
u64 end = start + len - 1;
if (io_decode == ACPI_DECODE_16)
- flags |= PNP_PORT_FLAG_16BITADDR;
+ flags |= IORESOURCE_IO_16BIT_ADDR;
if (len == 0 || end >= 0x10003)
flags |= IORESOURCE_DISABLED;
port->align = io->alignment;
port->size = io->address_length;
port->flags = ACPI_DECODE_16 == io->io_decode ?
- PNP_PORT_FLAG_16BITADDR : 0;
+ IORESOURCE_IO_16BIT_ADDR : 0;
pnp_register_port_resource(dev, option, port);
}
port->min = port->max = io->address;
port->size = io->address_length;
port->align = 0;
- port->flags = PNP_PORT_FLAG_FIXED;
+ port->flags = IORESOURCE_IO_FIXED;
pnp_register_port_resource(dev, option, port);
}
port->min = port->max = p->minimum;
port->size = p->address_length;
port->align = 0;
- port->flags = PNP_PORT_FLAG_FIXED;
+ port->flags = IORESOURCE_IO_FIXED;
pnp_register_port_resource(dev, option, port);
}
}
if (pnp_resource_enabled(p)) {
/* Note: pnp_assign_port copies pnp_port->flags into p->flags */
- io->io_decode = (p->flags & PNP_PORT_FLAG_16BITADDR) ?
+ io->io_decode = (p->flags & IORESOURCE_IO_16BIT_ADDR) ?
ACPI_DECODE_16 : ACPI_DECODE_10;
io->minimum = p->start;
io->maximum = p->end;
port->max = (p[5] << 8) | p[4];
port->align = p[6];
port->size = p[7];
- port->flags = p[1] ? PNP_PORT_FLAG_16BITADDR : 0;
+ port->flags = p[1] ? IORESOURCE_IO_16BIT_ADDR : 0;
pnp_register_port_resource(dev, option, port);
}
port->min = port->max = (p[2] << 8) | p[1];
port->size = p[3];
port->align = 0;
- port->flags = PNP_PORT_FLAG_FIXED;
+ port->flags = IORESOURCE_IO_FIXED;
pnp_register_port_resource(dev, option, port);
}
#define IORESOURCE_MEM_SHADOWABLE (1<<5) /* dup: IORESOURCE_SHADOWABLE */
#define IORESOURCE_MEM_EXPANSIONROM (1<<6)
+/* PnP I/O specific bits (IORESOURCE_BITS) */
+#define IORESOURCE_IO_16BIT_ADDR (1<<0)
+#define IORESOURCE_IO_FIXED (1<<1)
+
/* PCI ROM control bits (IORESOURCE_BITS) */
#define IORESOURCE_ROM_ENABLE (1<<0) /* ROM is enabled, same as PCI_ROM_ADDRESS_ENABLE */
#define IORESOURCE_ROM_SHADOW (1<<1) /* ROM is copy at C000:0 */
}
-#define PNP_PORT_FLAG_16BITADDR (1<<0)
-#define PNP_PORT_FLAG_FIXED (1<<1)
-
struct pnp_port {
unsigned short min; /* min base number */
unsigned short max; /* max base number */