drm/amd/display: Triplebuffering should not be used by default

Disable triplebuffering by default.

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 7ad2c3f7e281b163deefe002603dd81bb1066a07..643eb8e337aab1c17f9c6e7a41f5136cf33849d4 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -3375,9 +3375,6 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
                goto fail;
        }
 
-       /* No userspace support. */
-       dm->dc->debug.disable_tri_buf = true;
-
        return 0;
 fail:
        kfree(aencoder);

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index dc463d99ef50395e2b21778e9e779da09ade3dd9..511ab25b3f1aa4cf658d33e36e1a74d72e72c465 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -2415,8 +2415,7 @@ static void commit_planes_for_stream(struct dc *dc,
                                plane_state->triplebuffer_flips = false;
                                if (update_type == UPDATE_TYPE_FAST &&
                                        dc->hwss.program_triplebuffer != NULL &&
-                                       !plane_state->flip_immediate &&
-                                       !dc->debug.disable_tri_buf) {
+                                       !plane_state->flip_immediate && dc->debug.enable_tri_buf) {
                                                /*triple buffer for VUpdate  only*/
                                                plane_state->triplebuffer_flips = true;
                                }
@@ -2443,8 +2442,7 @@ static void commit_planes_for_stream(struct dc *dc,
 
                        ASSERT(!pipe_ctx->plane_state->triplebuffer_flips);
 
-                       if (dc->hwss.program_triplebuffer != NULL &&
-                               !dc->debug.disable_tri_buf) {
+                       if (dc->hwss.program_triplebuffer != NULL && dc->debug.enable_tri_buf) {
                                /*turn off triple buffer for full update*/
                                dc->hwss.program_triplebuffer(
                                        dc, pipe_ctx, pipe_ctx->plane_state->triplebuffer_flips);
@@ -2509,8 +2507,7 @@ static void commit_planes_for_stream(struct dc *dc,
                                if (pipe_ctx->plane_state != plane_state)
                                        continue;
                                /*program triple buffer after lock based on flip type*/
-                               if (dc->hwss.program_triplebuffer != NULL &&
-                                       !dc->debug.disable_tri_buf) {
+                               if (dc->hwss.program_triplebuffer != NULL && dc->debug.enable_tri_buf) {
                                        /*only enable triplebuffer for  fast_update*/
                                        dc->hwss.program_triplebuffer(
                                                dc, pipe_ctx, plane_state->triplebuffer_flips);

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 7416fd37e7d8d3aaf843a7997554e5f2f78d25f3..0607122e04ded843ff693a126cf1b020be5c3a79 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -476,7 +476,7 @@ struct dc_debug_options {
        unsigned int force_odm_combine_4to1; //bit vector based on otg inst
 #endif
        unsigned int force_fclk_khz;
-       bool disable_tri_buf;
+       bool enable_tri_buf;
        bool dmub_offload_enabled;
        bool dmcub_emulation;
 #if defined(CONFIG_DRM_AMD_DC_DCN3_0)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index ee3348711abeee3815a934d720d1c5214f5db832..ee56060943f1cd526062b6ca64dc6729304bf2e9 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -1642,16 +1642,15 @@ void dcn20_program_front_end_for_ctx(
        struct dce_hwseq *hws = dc->hwseq;
        DC_LOGGER_INIT(dc->ctx->logger);
 
-       for (i = 0; i < dc->res_pool->pipe_count; i++) {
-               struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
+       if (dc->hwss.program_triplebuffer != NULL && dc->debug.enable_tri_buf) {
+               for (i = 0; i < dc->res_pool->pipe_count; i++) {
+                       struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
 
-               if (!pipe_ctx->top_pipe && !pipe_ctx->prev_odm_pipe && pipe_ctx->plane_state) {
-                       ASSERT(!pipe_ctx->plane_state->triplebuffer_flips);
-                       if (dc->hwss.program_triplebuffer != NULL &&
-                               !dc->debug.disable_tri_buf) {
+                       if (!pipe_ctx->top_pipe && !pipe_ctx->prev_odm_pipe && pipe_ctx->plane_state) {
+                               ASSERT(!pipe_ctx->plane_state->triplebuffer_flips);
                                /*turn off triple buffer for full update*/
                                dc->hwss.program_triplebuffer(
-                                       dc, pipe_ctx, pipe_ctx->plane_state->triplebuffer_flips);
+                                               dc, pipe_ctx, pipe_ctx->plane_state->triplebuffer_flips);
                        }
                }
        }

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
index 1b98744451345272648c4548558a15bcfa216837..55ce2c7df84efeb24e9201c59a506a7cd56cfc23 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
@@ -1075,7 +1075,6 @@ static const struct dc_debug_options debug_defaults_drv = {
                .disable_pplib_wm_range = false,
                .scl_reset_length10 = true,
                .sanity_checks = false,
-               .disable_tri_buf = true,
                .underflow_assert_delay_us = 0xFFFFFFFF,
 };
 
@@ -1092,6 +1091,7 @@ static const struct dc_debug_options debug_defaults_diags = {
                .disable_stutter = true,
                .scl_reset_length10 = true,
                .underflow_assert_delay_us = 0xFFFFFFFF,
+               .enable_tri_buf = true,
 };
 
 void dcn20_dpp_destroy(struct dpp **dpp)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
index 78743ae37851f7f8725e8f48f6d1343613c0e216..e73785e74cba8bc68e00ffc546671d1dd6bcaec2 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
@@ -894,6 +894,8 @@ static const struct dc_debug_options debug_defaults_diags = {
                .disable_pplib_wm_range = true,
                .disable_stutter = true,
                .disable_48mhz_pwrdwn = true,
+               .disable_psr = true,
+               .enable_tri_buf = true
 };
 
 enum dcn20_clk_src_array_id {

diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
index 8be4f21169d07a66bb67a3fe71daf0ac69015859..6746d582d723c179258bbd54f28591e707e232c3 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
@@ -865,6 +865,7 @@ static const struct dc_debug_options debug_defaults_diags = {
        .scl_reset_length10 = true,
        .dwb_fi_phase = -1, // -1 = disable
        .dmub_command_table = true,
+       .enable_tri_buf = true,
 };
 
 void dcn30_dpp_destroy(struct dpp **dpp)