ARM: dts: dra76x: m_can: fix order of clocks

BugLink: https://bugs.launchpad.net/bugs/1908562
[ Upstream commit 05d5de6ba7dbe490dd413b5ca11d0875bd2bc006 ]

According to the bosch,m_can.yaml bindings the first clock shall be the "hclk",
while the second clock "cclk".

This patch fixes the order accordingly.

Fixes: 0adbe832f21a ("ARM: dts: dra76x: Add MCAN node")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: linux-omap@vger.kernel.org
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Signed-off-by: Kamal Mostafa <kamal@canonical.com>
Signed-off-by: Ian May <ian.may@canonical.com>

diff --git a/arch/arm/boot/dts/dra76x.dtsi b/arch/arm/boot/dts/dra76x.dtsi
index 9f6fbe4c1fee1bdb324bfdb4deab6d78350d7fb0..859e4382ac4bbaf65e80e39ae87053789bb0f1b9 100644 (file)
--- a/arch/arm/boot/dts/dra76x.dtsi
+++ b/arch/arm/boot/dts/dra76x.dtsi
@@ -32,8 +32,8 @@
                                interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
                                interrupt-names = "int0", "int1";
-                               clocks = <&mcan_clk>, <&l3_iclk_div>;
-                               clock-names = "cclk", "hclk";
+                               clocks = <&l3_iclk_div>, <&mcan_clk>;
+                               clock-names = "hclk", "cclk";
                                bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;
                        };
                };