#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-sm8250.h>
+#include <dt-bindings/clock/qcom,gpucc-sm8250.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/mailbox/qcom-ipcc.h>
#include <dt-bindings/power/qcom-aoss-qmp.h>
<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hfi", "gmu";
- clocks = <&gpucc 0>,
- <&gpucc 3>,
- <&gpucc 6>,
+ clocks = <&gpucc GPU_CC_AHB_CLK>,
+ <&gpucc GPU_CC_CX_GMU_CLK>,
+ <&gpucc GPU_CC_CXO_CLK>,
<&gcc GCC_DDRSS_GPU_AXI_CLK>,
<&gcc GCC_GPU_MEMNOC_GFX_CLK>;
clock-names = "ahb", "gmu", "cxo", "axi", "memnoc";
- power-domains = <&gpucc 0>,
- <&gpucc 1>;
+ power-domains = <&gpucc GPU_CX_GDSC>,
+ <&gpucc GPU_GX_GDSC>;
power-domain-names = "cx", "gx";
iommus = <&adreno_smmu 5 0x400>;
<GIC_SPI 683 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 684 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 685 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gpucc 0>,
+ clocks = <&gpucc GPU_CC_AHB_CLK>,
<&gcc GCC_GPU_MEMNOC_GFX_CLK>,
<&gcc GCC_GPU_SNOC_DVM_GFX_CLK>;
clock-names = "ahb", "bus", "iface";
- power-domains = <&gpucc 0>;
+ power-domains = <&gpucc GPU_CX_GDSC>;
};
slpi: remoteproc@5c00000 {