]> git.proxmox.com Git - mirror_ubuntu-kernels.git/commitdiff
ASoC: cs42l42: Wait at least 150us after writing SCLK_PRESENT
authorRichard Fitzgerald <rf@opensource.cirrus.com>
Sat, 6 Mar 2021 18:55:51 +0000 (18:55 +0000)
committerMark Brown <broonie@kernel.org>
Wed, 10 Mar 2021 13:14:29 +0000 (13:14 +0000)
There must be a delay of at least 150us after writing SCLK_PRESENT
before issuing another I2C write.

This is done using struct reg_sequence because it can specify a delay
after the write and the whole sequence is written atomically.

Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Signed-off-by: Lucas Tanure <tanureal@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20210306185553.62053-14-tanureal@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/cs42l42.c
sound/soc/codecs/cs42l42.h

index 68b7ed71ad542524cfc4206898d50d6146f652bc..08718fd10fb9b02c58adea64d3018c1c111f7964 100644 (file)
@@ -549,6 +549,24 @@ static const struct snd_soc_component_driver soc_component_dev_cs42l42 = {
        .non_legacy_dai_naming  = 1,
 };
 
+/* Switch to SCLK. Atomic delay after the write to allow the switch to complete. */
+static const struct reg_sequence cs42l42_to_sclk_seq[] = {
+       {
+               .reg = CS42L42_OSC_SWITCH,
+               .def = CS42L42_SCLK_PRESENT_MASK,
+               .delay_us = CS42L42_CLOCK_SWITCH_DELAY_US,
+       },
+};
+
+/* Switch to OSC. Atomic delay after the write to allow the switch to complete. */
+static const struct reg_sequence cs42l42_to_osc_seq[] = {
+       {
+               .reg = CS42L42_OSC_SWITCH,
+               .def = 0,
+               .delay_us = CS42L42_CLOCK_SWITCH_DELAY_US,
+       },
+};
+
 struct cs42l42_pll_params {
        u32 sclk;
        u8 mclk_div;
@@ -861,8 +879,8 @@ static int cs42l42_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
                         * SCLK must remain running until after this clock switch.
                         * Without a source of clock the I2C bus doesn't work.
                         */
-                       snd_soc_component_update_bits(component, CS42L42_OSC_SWITCH,
-                                                     CS42L42_SCLK_PRESENT_MASK, 0);
+                       regmap_multi_reg_write(cs42l42->regmap, cs42l42_to_osc_seq,
+                                              ARRAY_SIZE(cs42l42_to_osc_seq));
                        snd_soc_component_update_bits(component, CS42L42_PLL_CTL1,
                                                      CS42L42_PLL_START_MASK, 0);
                }
@@ -873,9 +891,8 @@ static int cs42l42_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
                                                      CS42L42_PLL_START_MASK, 1);
 
                        /* Mark SCLK as present, turn off internal oscillator */
-                       snd_soc_component_update_bits(component, CS42L42_OSC_SWITCH,
-                                                     CS42L42_SCLK_PRESENT_MASK,
-                                                     CS42L42_SCLK_PRESENT_MASK);
+                       regmap_multi_reg_write(cs42l42->regmap, cs42l42_to_sclk_seq,
+                                              ARRAY_SIZE(cs42l42_to_sclk_seq));
                }
                cs42l42->stream_use |= 1 << stream;
 
index 429c6833fc811a668b108cb9c0e013b7f32adadb..214cee762709d63cbfdc0d4f5f8932819f7d7f8c 100644 (file)
 
 #define CS42L42_NUM_SUPPLIES   5
 #define CS42L42_BOOT_TIME_US   3000
+#define CS42L42_CLOCK_SWITCH_DELAY_US 150
 
 static const char *const cs42l42_supply_names[CS42L42_NUM_SUPPLIES] = {
        "VA",