drm/amd/pp: Simplified the avfs btc state on smu7

AVFS feature support/not support is enough to driver.

so remove the complex define of the avfs btc state.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index df2a312ca6c993fb73ae3309f42ee4920034ed84..7a87209f725884413684a848315243e68bfaa938 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -40,7 +40,6 @@
 
 #include "hwmgr.h"
 #include "smu7_hwmgr.h"
-#include "smu7_smumgr.h"
 #include "smu_ucode_xfer_vi.h"
 #include "smu7_powertune.h"
 #include "smu7_dyn_defaults.h"
@@ -1353,12 +1352,7 @@ static int smu7_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
 
 static int smu7_avfs_control(struct pp_hwmgr *hwmgr, bool enable)
 {
-       struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend);
-
-       if (smu_data == NULL)
-               return -EINVAL;
-
-       if (smu_data->avfs.avfs_btc_status == AVFS_BTC_NOTSUPPORTED)
+       if (!hwmgr->avfs_supported)
                return 0;
 
        if (enable) {
@@ -1382,13 +1376,9 @@ static int smu7_avfs_control(struct pp_hwmgr *hwmgr, bool enable)
 
 static int smu7_update_avfs(struct pp_hwmgr *hwmgr)
 {
-       struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend);
        struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
 
-       if (smu_data == NULL)
-               return -EINVAL;
-
-       if (smu_data->avfs.avfs_btc_status == AVFS_BTC_NOTSUPPORTED)
+       if (!hwmgr->avfs_supported)
                return 0;
 
        if (data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_VDDC) {

diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
index b151ad85666a89ab0115089e435003089e0a1c20..312fbc3cdf5fcac866f60bf9d330bbca61a95227 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
@@ -748,7 +748,7 @@ struct pp_hwmgr {
        struct pp_power_state    *uvd_ps;
        struct amd_pp_display_configuration display_config;
        uint32_t feature_mask;
-
+       bool avfs_supported;
        /* UMD Pstate */
        bool en_umd_pstate;
        uint32_t power_profile_mode;

diff --git a/drivers/gpu/drm/amd/powerplay/inc/smumgr.h b/drivers/gpu/drm/amd/powerplay/inc/smumgr.h
index 9bba0a069ed61d9c8283fc971f0fdd150e7eaec9..19048b098c7e72c482a2541fa34650331eff5386 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/inc/smumgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/smumgr.h
@@ -26,27 +26,6 @@
 #include "amd_powerplay.h"
 #include "hwmgr.h"
 
-enum AVFS_BTC_STATUS {
-       AVFS_BTC_BOOT = 0,
-       AVFS_BTC_BOOT_STARTEDSMU,
-       AVFS_LOAD_VIRUS,
-       AVFS_BTC_VIRUS_LOADED,
-       AVFS_BTC_VIRUS_FAIL,
-       AVFS_BTC_COMPLETED_PREVIOUSLY,
-       AVFS_BTC_ENABLEAVFS,
-       AVFS_BTC_STARTED,
-       AVFS_BTC_FAILED,
-       AVFS_BTC_RESTOREVFT_FAILED,
-       AVFS_BTC_SAVEVFT_FAILED,
-       AVFS_BTC_DPMTABLESETUP_FAILED,
-       AVFS_BTC_COMPLETED_UNSAVED,
-       AVFS_BTC_COMPLETED_SAVED,
-       AVFS_BTC_COMPLETED_RESTORED,
-       AVFS_BTC_DISABLED,
-       AVFS_BTC_NOTSUPPORTED,
-       AVFS_BTC_SMUMSG_ERROR
-};
-
 enum SMU_TABLE {
        SMU_UVD_TABLE = 0,
        SMU_VCE_TABLE,

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
index 0b2b5d155e5e901163d37f83c2e8237b37973abd..ed2e2e9c5715994c1cf73cab2ec7cdf2bb2252ab 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
@@ -205,9 +205,9 @@ static int fiji_start_avfs_btc(struct pp_hwmgr *hwmgr)
        int result = 0;
        struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend);
 
-       if (0 != smu_data->avfs.avfs_btc_param) {
+       if (0 != smu_data->avfs_btc_param) {
                if (0 != smu7_send_msg_to_smc_with_parameter(hwmgr,
-                               PPSMC_MSG_PerformBtc, smu_data->avfs.avfs_btc_param)) {
+                               PPSMC_MSG_PerformBtc, smu_data->avfs_btc_param)) {
                        pr_info("[AVFS][Fiji_PerformBtc] PerformBTC SMU msg failed");
                        result = -EINVAL;
                }
@@ -261,43 +261,21 @@ static int fiji_setup_graphics_level_structure(struct pp_hwmgr *hwmgr)
        return 0;
 }
 
-static int fiji_avfs_event_mgr(struct pp_hwmgr *hwmgr, bool smu_started)
+static int fiji_avfs_event_mgr(struct pp_hwmgr *hwmgr)
 {
-       struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend);
-
-       switch (smu_data->avfs.avfs_btc_status) {
-       case AVFS_BTC_COMPLETED_PREVIOUSLY:
-               break;
+       PP_ASSERT_WITH_CODE(0 == fiji_setup_graphics_level_structure(hwmgr),
+                       "[AVFS][fiji_avfs_event_mgr] Could not Copy Graphics Level"
+                       " table over to SMU",
+                       return -EINVAL);
+       PP_ASSERT_WITH_CODE(0 == smu7_setup_pwr_virus(hwmgr),
+                       "[AVFS][fiji_avfs_event_mgr] Could not setup "
+                       "Pwr Virus for AVFS ",
+                       return -EINVAL);
+       PP_ASSERT_WITH_CODE(0 == fiji_start_avfs_btc(hwmgr),
+                       "[AVFS][fiji_avfs_event_mgr] Failure at "
+                       "fiji_start_avfs_btc. AVFS Disabled",
+                       return -EINVAL);
 
-       case AVFS_BTC_BOOT: /*Cold Boot State - Post SMU Start*/
-               if (!smu_started)
-                       break;
-               smu_data->avfs.avfs_btc_status = AVFS_BTC_FAILED;
-               PP_ASSERT_WITH_CODE(0 == fiji_setup_graphics_level_structure(hwmgr),
-                               "[AVFS][fiji_avfs_event_mgr] Could not Copy Graphics Level"
-                               " table over to SMU",
-                               return -EINVAL;);
-               smu_data->avfs.avfs_btc_status = AVFS_BTC_VIRUS_FAIL;
-               PP_ASSERT_WITH_CODE(0 == smu7_setup_pwr_virus(hwmgr),
-                               "[AVFS][fiji_avfs_event_mgr] Could not setup "
-                               "Pwr Virus for AVFS ",
-                               return -EINVAL;);
-               smu_data->avfs.avfs_btc_status = AVFS_BTC_FAILED;
-               PP_ASSERT_WITH_CODE(0 == fiji_start_avfs_btc(hwmgr),
-                               "[AVFS][fiji_avfs_event_mgr] Failure at "
-                               "fiji_start_avfs_btc. AVFS Disabled",
-                               return -EINVAL;);
-
-               smu_data->avfs.avfs_btc_status = AVFS_BTC_ENABLEAVFS;
-               break;
-       case AVFS_BTC_DISABLED: /* Do nothing */
-       case AVFS_BTC_NOTSUPPORTED: /* Do nothing */
-       case AVFS_BTC_ENABLEAVFS:
-               break;
-       default:
-               pr_err("AVFS failed status is %x !\n", smu_data->avfs.avfs_btc_status);
-               break;
-       }
        return 0;
 }
 
@@ -309,8 +287,6 @@ static int fiji_start_smu(struct pp_hwmgr *hwmgr)
        /* Only start SMC if SMC RAM is not running */
        if (!(smu7_is_smc_ram_running(hwmgr)
                || cgs_is_virtualization_enabled(hwmgr->device))) {
-               fiji_avfs_event_mgr(hwmgr, false);
-
                /* Check if SMU is running in protected mode */
                if (0 == PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device,
                                CGS_IND_REG__SMC,
@@ -323,7 +299,8 @@ static int fiji_start_smu(struct pp_hwmgr *hwmgr)
                        if (result)
                                return result;
                }
-               fiji_avfs_event_mgr(hwmgr, true);
+               if (fiji_avfs_event_mgr(hwmgr))
+                       hwmgr->avfs_supported = false;
        }
 
        /* To initialize all clock gating before RLC loaded and running.*/
@@ -2315,19 +2292,12 @@ static int fiji_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
 
 static int fiji_thermal_avfs_enable(struct pp_hwmgr *hwmgr)
 {
-       int ret;
-       struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend);
-
-       if (smu_data->avfs.avfs_btc_status != AVFS_BTC_ENABLEAVFS)
+       if (!hwmgr->avfs_supported)
                return 0;
 
-       ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableAvfs);
+       smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableAvfs);
 
-       if (!ret)
-               /* If this param is not changed, this function could fire unnecessarily */
-               smu_data->avfs.avfs_btc_status = AVFS_BTC_COMPLETED_PREVIOUSLY;
-
-       return ret;
+       return 0;
 }
 
 static int fiji_program_mem_timing_parameters(struct pp_hwmgr *hwmgr)

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
index 632d1ca2f69cc23166f7cba1868242ef058cf12f..0609acf9c0f1a40694ffa7ab9656c7e633a66234 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
@@ -99,13 +99,13 @@ static int polaris10_perform_btc(struct pp_hwmgr *hwmgr)
        int result = 0;
        struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend);
 
-       if (0 != smu_data->avfs.avfs_btc_param) {
-               if (0 != smu7_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_PerformBtc, smu_data->avfs.avfs_btc_param)) {
+       if (0 != smu_data->avfs_btc_param) {
+               if (0 != smu7_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_PerformBtc, smu_data->avfs_btc_param)) {
                        pr_info("[AVFS][SmuPolaris10_PerformBtc] PerformBTC SMU msg failed");
                        result = -1;
                }
        }
-       if (smu_data->avfs.avfs_btc_param > 1) {
+       if (smu_data->avfs_btc_param > 1) {
                /* Soft-Reset to reset the engine before loading uCode */
                /* halt */
                cgs_write_register(hwmgr->device, mmCP_MEC_CNTL, 0x50000000);
@@ -173,46 +173,25 @@ static int polaris10_setup_graphics_level_structure(struct pp_hwmgr *hwmgr)
 
 
 static int
-polaris10_avfs_event_mgr(struct pp_hwmgr *hwmgr, bool SMU_VFT_INTACT)
+polaris10_avfs_event_mgr(struct pp_hwmgr *hwmgr)
 {
        struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend);
 
-       switch (smu_data->avfs.avfs_btc_status) {
-       case AVFS_BTC_COMPLETED_PREVIOUSLY:
-               break;
-
-       case AVFS_BTC_BOOT: /* Cold Boot State - Post SMU Start */
-
-               smu_data->avfs.avfs_btc_status = AVFS_BTC_DPMTABLESETUP_FAILED;
-               PP_ASSERT_WITH_CODE(0 == polaris10_setup_graphics_level_structure(hwmgr),
-                       "[AVFS][Polaris10_AVFSEventMgr] Could not Copy Graphics Level table over to SMU",
-                       return -EINVAL);
-
-               if (smu_data->avfs.avfs_btc_param > 1) {
-                       pr_info("[AVFS][Polaris10_AVFSEventMgr] AC BTC has not been successfully verified on Fiji. There may be in this setting.");
-                       smu_data->avfs.avfs_btc_status = AVFS_BTC_VIRUS_FAIL;
-                       PP_ASSERT_WITH_CODE(0 == smu7_setup_pwr_virus(hwmgr),
-                       "[AVFS][Polaris10_AVFSEventMgr] Could not setup Pwr Virus for AVFS ",
-                       return -EINVAL);
-               }
+       PP_ASSERT_WITH_CODE(0 == polaris10_setup_graphics_level_structure(hwmgr),
+               "[AVFS][Polaris10_AVFSEventMgr] Could not Copy Graphics Level table over to SMU",
+               return -EINVAL);
 
-               smu_data->avfs.avfs_btc_status = AVFS_BTC_FAILED;
-               PP_ASSERT_WITH_CODE(0 == polaris10_perform_btc(hwmgr),
-                                       "[AVFS][Polaris10_AVFSEventMgr] Failure at SmuPolaris10_PerformBTC. AVFS Disabled",
-                                return -EINVAL);
-               smu_data->avfs.avfs_btc_status = AVFS_BTC_ENABLEAVFS;
-               break;
-
-       case AVFS_BTC_DISABLED:
-       case AVFS_BTC_ENABLEAVFS:
-       case AVFS_BTC_NOTSUPPORTED:
-               break;
-
-       default:
-               pr_err("AVFS failed status is %x!\n", smu_data->avfs.avfs_btc_status);
-               break;
+       if (smu_data->avfs_btc_param > 1) {
+               pr_info("[AVFS][Polaris10_AVFSEventMgr] AC BTC has not been successfully verified on Fiji. There may be in this setting.");
+               PP_ASSERT_WITH_CODE(0 == smu7_setup_pwr_virus(hwmgr),
+               "[AVFS][Polaris10_AVFSEventMgr] Could not setup Pwr Virus for AVFS ",
+               return -EINVAL);
        }
 
+       PP_ASSERT_WITH_CODE(0 == polaris10_perform_btc(hwmgr),
+                               "[AVFS][Polaris10_AVFSEventMgr] Failure at SmuPolaris10_PerformBTC. AVFS Disabled",
+                        return -EINVAL);
+
        return 0;
 }
 
@@ -312,11 +291,10 @@ static int polaris10_start_smu(struct pp_hwmgr *hwmgr)
 {
        int result = 0;
        struct polaris10_smumgr *smu_data = (struct polaris10_smumgr *)(hwmgr->smu_backend);
-       bool SMU_VFT_INTACT;
 
        /* Only start SMC if SMC RAM is not running */
-       if (!smu7_is_smc_ram_running(hwmgr)) {
-               SMU_VFT_INTACT = false;
+       if (!(smu7_is_smc_ram_running(hwmgr)
+               || cgs_is_virtualization_enabled(hwmgr->device))) {
                smu_data->protected_mode = (uint8_t) (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMU_FIRMWARE, SMU_MODE));
                smu_data->smu7_data.security_hard_key = (uint8_t) (PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMU_FIRMWARE, SMU_SEL));
 
@@ -337,11 +315,9 @@ static int polaris10_start_smu(struct pp_hwmgr *hwmgr)
                if (result != 0)
                        PP_ASSERT_WITH_CODE(0, "Failed to load SMU ucode.", return result);
 
-               polaris10_avfs_event_mgr(hwmgr, true);
-       } else
-               SMU_VFT_INTACT = true; /*Driver went offline but SMU was still alive and contains the VFT table */
+               polaris10_avfs_event_mgr(hwmgr);
+       }
 
-       polaris10_avfs_event_mgr(hwmgr, SMU_VFT_INTACT);
        /* Setup SoftRegsStart here for register lookup in case DummyBackEnd is used and ProcessFirmwareHeader is not executed */
        smu7_read_smc_sram_dword(hwmgr, SMU7_FIRMWARE_HEADER_LOCATION + offsetof(SMU74_Firmware_Header, SoftRegisters),
                                        &(smu_data->smu7_data.soft_regs_start), 0x40000);
@@ -1732,8 +1708,8 @@ static int polaris10_populate_avfs_parameters(struct pp_hwmgr *hwmgr)
                        table_info->vdd_dep_on_sclk;
 
 
-       if (((struct smu7_smumgr *)smu_data)->avfs.avfs_btc_status == AVFS_BTC_NOTSUPPORTED)
-               return result;
+       if (!hwmgr->avfs_supported)
+               return 0;
 
        result = atomctrl_get_avfs_information(hwmgr, &avfs_params);
 
@@ -2070,24 +2046,17 @@ static int polaris10_program_mem_timing_parameters(struct pp_hwmgr *hwmgr)
 
 int polaris10_thermal_avfs_enable(struct pp_hwmgr *hwmgr)
 {
-       int ret;
-       struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend);
        struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
 
-       if (smu_data->avfs.avfs_btc_status == AVFS_BTC_NOTSUPPORTED)
+       if (!hwmgr->avfs_supported)
                return 0;
 
-       ret = smum_send_msg_to_smc_with_parameter(hwmgr,
+       smum_send_msg_to_smc_with_parameter(hwmgr,
                        PPSMC_MSG_SetGBDroopSettings, data->avfs_vdroop_override_setting);
 
-       ret = (smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableAvfs) == 0) ?
-                       0 : -1;
+       smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableAvfs);
 
-       if (!ret)
-               /* If this param is not changed, this function could fire unnecessarily */
-               smu_data->avfs.avfs_btc_status = AVFS_BTC_COMPLETED_PREVIOUSLY;
-
-       return ret;
+       return 0;
 }
 
 static int polaris10_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
index dcb151cabc0012b3fcca78871be6c6245a2a7bf9..0399c10d2be059688b9a39ac97f5e4ac17c5490c 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
@@ -629,9 +629,7 @@ int smu7_init(struct pp_hwmgr *hwmgr)
        smu_data->smu_buffer.mc_addr = mc_addr;
 
        if (smum_is_hw_avfs_present(hwmgr))
-               smu_data->avfs.avfs_btc_status = AVFS_BTC_BOOT;
-       else
-               smu_data->avfs.avfs_btc_status = AVFS_BTC_NOTSUPPORTED;
+               hwmgr->avfs_supported = true;
 
        return 0;
 }

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.h b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.h
index 64334a82b77bd153a6b186e0fcf02a06327fe398..126d300259baac3c30c9cfa446dd615eb2030f78 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.h
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.h
@@ -36,11 +36,6 @@ struct smu7_buffer_entry {
        struct amdgpu_bo *handle;
 };
 
-struct smu7_avfs {
-       enum AVFS_BTC_STATUS avfs_btc_status;
-       uint32_t           avfs_btc_param;
-};
-
 struct smu7_smumgr {
        uint8_t *header;
        uint8_t *mec_image;
@@ -55,7 +50,7 @@ struct smu7_smumgr {
        uint32_t                             ulv_setting_starts;
        uint8_t                              security_hard_key;
        uint32_t                             acpi_optimization;
-       struct smu7_avfs                     avfs;
+       uint32_t                             avfs_btc_param;
 };