Merge branch 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux

This merge syncs with mlx5-next latest HW bits and layout updates for next
features, in addition one patch that improves
mlx5_create_auto_grouped_flow_table() API across all mlx5 users.

* 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux:
  net/mlx5: Refactor mlx5_create_auto_grouped_flow_table
  net/mlx5e: Add discard counters per priority
  net/mlx5e: Expose FEC feilds and related capability bit
  net/mlx5: Add mlx5_ifc definitions for connection tracking support
  net/mlx5: Add copy header action struct layout
  net/mlx5: Expose resource dump register mapping
  net/mlx5: Add structures and defines for MIRC register
  net/mlx5: Read MCAM register groups 1 and 2
  net/mlx5: Add structures layout for new MCAM access reg groups
  net/mlx5: Expose vDPA emulation device capabilities
  net/mlx5: Add Virtio Emulation related device capabilities

Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>

diff --git a/drivers/infiniband/hw/mlx5/main.c b/drivers/infiniband/hw/mlx5/main.c
index 997cbfe4b90ce453308b109db9d48d2f7347bdd6..90489c5f0c6ffbe3cc1b787b1655f53852827a0b 100644 (file)
--- a/drivers/infiniband/hw/mlx5/main.c
+++ b/drivers/infiniband/hw/mlx5/main.c
@@ -3276,12 +3276,14 @@ static struct mlx5_ib_flow_prio *_get_prio(struct mlx5_flow_namespace *ns,
                                           int num_entries, int num_groups,
                                           u32 flags)
 {
+       struct mlx5_flow_table_attr ft_attr = {};
        struct mlx5_flow_table *ft;
 
-       ft = mlx5_create_auto_grouped_flow_table(ns, priority,
-                                                num_entries,
-                                                num_groups,
-                                                0, flags);
+       ft_attr.prio = priority;
+       ft_attr.max_fte = num_entries;
+       ft_attr.flags = flags;
+       ft_attr.autogroup.max_num_groups = num_groups;
+       ft = mlx5_create_auto_grouped_flow_table(ns, &ft_attr);
        if (IS_ERR(ft))
                return ERR_CAST(ft);
 

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c b/drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c
index acd946f2ddbe725d4612236541d2c1ad374ed7ed..3bc2ac3d53fc9c0b5f14acdb0e22f91a605e6331 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c
@@ -58,6 +58,7 @@ static struct mlx5e_ethtool_table *get_flow_table(struct mlx5e_priv *priv,
                                                  struct ethtool_rx_flow_spec *fs,
                                                  int num_tuples)
 {
+       struct mlx5_flow_table_attr ft_attr = {};
        struct mlx5e_ethtool_table *eth_ft;
        struct mlx5_flow_namespace *ns;
        struct mlx5_flow_table *ft;
@@ -102,9 +103,11 @@ static struct mlx5e_ethtool_table *get_flow_table(struct mlx5e_priv *priv,
        table_size = min_t(u32, BIT(MLX5_CAP_FLOWTABLE(priv->mdev,
                                                       flow_table_properties_nic_receive.log_max_ft_size)),
                           MLX5E_ETHTOOL_NUM_ENTRIES);
-       ft = mlx5_create_auto_grouped_flow_table(ns, prio,
-                                                table_size,
-                                                MLX5E_ETHTOOL_NUM_GROUPS, 0, 0);
+
+       ft_attr.prio = prio;
+       ft_attr.max_fte = table_size;
+       ft_attr.autogroup.max_num_groups = MLX5E_ETHTOOL_NUM_GROUPS;
+       ft = mlx5_create_auto_grouped_flow_table(ns, &ft_attr);
        if (IS_ERR(ft))
                return (void *)ft;
 

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
index a05158472ed11cd5901b4982be5d77ebd0091779..4291db78efc989dc3a24c606dbbab5336cc5c6a7 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
@@ -1133,6 +1133,7 @@ static void mlx5e_grp_per_port_buffer_congest_update_stats(struct mlx5e_priv *pr
 static const struct counter_desc pport_per_prio_traffic_stats_desc[] = {
        { "rx_prio%d_bytes", PPORT_PER_PRIO_OFF(rx_octets) },
        { "rx_prio%d_packets", PPORT_PER_PRIO_OFF(rx_frames) },
+       { "rx_prio%d_discards", PPORT_PER_PRIO_OFF(rx_discards) },
        { "tx_prio%d_bytes", PPORT_PER_PRIO_OFF(tx_octets) },
        { "tx_prio%d_packets", PPORT_PER_PRIO_OFF(tx_frames) },
 };

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c b/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
index db614bd6bd1f34ff958a47c3ea9c895fe361196e..5aafbb8d2e8e24b2c825c362d67e0f4ae8962147 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
@@ -960,7 +960,8 @@ mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
 
        mutex_lock(&priv->fs.tc.t_lock);
        if (IS_ERR_OR_NULL(priv->fs.tc.t)) {
-               int tc_grp_size, tc_tbl_size;
+               struct mlx5_flow_table_attr ft_attr = {};
+               int tc_grp_size, tc_tbl_size, tc_num_grps;
                u32 max_flow_counter;
 
                max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) |
@@ -970,13 +971,15 @@ mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
 
                tc_tbl_size = min_t(int, tc_grp_size * MLX5E_TC_TABLE_NUM_GROUPS,
                                    BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev, log_max_ft_size)));
+               tc_num_grps = MLX5E_TC_TABLE_NUM_GROUPS;
 
+               ft_attr.prio = MLX5E_TC_PRIO;
+               ft_attr.max_fte = tc_tbl_size;
+               ft_attr.level = MLX5E_TC_FT_LEVEL;
+               ft_attr.autogroup.max_num_groups = tc_num_grps;
                priv->fs.tc.t =
                        mlx5_create_auto_grouped_flow_table(priv->fs.ns,
-                                                           MLX5E_TC_PRIO,
-                                                           tc_tbl_size,
-                                                           MLX5E_TC_TABLE_NUM_GROUPS,
-                                                           MLX5E_TC_FT_LEVEL, 0);
+                                                           &ft_attr);
                if (IS_ERR(priv->fs.tc.t)) {
                        mutex_unlock(&priv->fs.tc.t_lock);
                        NL_SET_ERR_MSG_MOD(extack,

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
index 2c965ad0d74421e85c46b3e5d65a9dbcee9a7551..05b13a1e829c171f14c9870dff130c67cfe0ecf8 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
@@ -277,6 +277,7 @@ enum {
 
 static int esw_create_legacy_vepa_table(struct mlx5_eswitch *esw)
 {
+       struct mlx5_flow_table_attr ft_attr = {};
        struct mlx5_core_dev *dev = esw->dev;
        struct mlx5_flow_namespace *root_ns;
        struct mlx5_flow_table *fdb;
@@ -289,8 +290,10 @@ static int esw_create_legacy_vepa_table(struct mlx5_eswitch *esw)
        }
 
        /* num FTE 2, num FG 2 */
-       fdb = mlx5_create_auto_grouped_flow_table(root_ns, LEGACY_VEPA_PRIO,
-                                                 2, 2, 0, 0);
+       ft_attr.prio = LEGACY_VEPA_PRIO;
+       ft_attr.max_fte = 2;
+       ft_attr.autogroup.max_num_groups = 2;
+       fdb = mlx5_create_auto_grouped_flow_table(root_ns, &ft_attr);
        if (IS_ERR(fdb)) {
                err = PTR_ERR(fdb);
                esw_warn(dev, "Failed to create VEPA FDB err %d\n", err);

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
index 243a5440867e19b5378e4dbb5d0cdce64623db13..4b0d992263b116c44a323caf91bd7bc12df8de55 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
@@ -904,6 +904,7 @@ create_next_size_table(struct mlx5_eswitch *esw,
                       int level,
                       u32 flags)
 {
+       struct mlx5_flow_table_attr ft_attr = {};
        struct mlx5_flow_table *fdb;
        int sz;
 
@@ -911,12 +912,12 @@ create_next_size_table(struct mlx5_eswitch *esw,
        if (!sz)
                return ERR_PTR(-ENOSPC);
 
-       fdb = mlx5_create_auto_grouped_flow_table(ns,
-                                                 table_prio,
-                                                 sz,
-                                                 ESW_OFFLOADS_NUM_GROUPS,
-                                                 level,
-                                                 flags);
+       ft_attr.max_fte = sz;
+       ft_attr.prio = table_prio;
+       ft_attr.level = level;
+       ft_attr.flags = flags;
+       ft_attr.autogroup.max_num_groups = ESW_OFFLOADS_NUM_GROUPS;
+       fdb = mlx5_create_auto_grouped_flow_table(ns, &ft_attr);
        if (IS_ERR(fdb)) {
                esw_warn(esw->dev, "Failed to create FDB Table err %d (table prio: %d, level: %d, size: %d)\n",
                         (int)PTR_ERR(fdb), table_prio, level, sz);

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads_termtbl.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads_termtbl.c
index 366bda1bb1c32edfaad041d0b158f160cdb591ed..dc08ed9339ab44a7beca458d45d611a47b4acb1f 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads_termtbl.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads_termtbl.c
@@ -50,8 +50,8 @@ mlx5_eswitch_termtbl_create(struct mlx5_core_dev *dev,
                            struct mlx5_flow_act *flow_act)
 {
        static const struct mlx5_flow_spec spec = {};
+       struct mlx5_flow_table_attr ft_attr = {};
        struct mlx5_flow_namespace *root_ns;
-       int prio, flags;
        int err;
 
        root_ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_FDB);
@@ -63,10 +63,11 @@ mlx5_eswitch_termtbl_create(struct mlx5_core_dev *dev,
        /* As this is the terminating action then the termination table is the
         * same prio as the slow path
         */
-       prio = FDB_SLOW_PATH;
-       flags = MLX5_FLOW_TABLE_TERMINATION;
-       tt->termtbl = mlx5_create_auto_grouped_flow_table(root_ns, prio, 1, 1,
-                                                         0, flags);
+       ft_attr.flags = MLX5_FLOW_TABLE_TERMINATION;
+       ft_attr.prio = FDB_SLOW_PATH;
+       ft_attr.max_fte = 1;
+       ft_attr.autogroup.max_num_groups = 1;
+       tt->termtbl = mlx5_create_auto_grouped_flow_table(root_ns, &ft_attr);
        if (IS_ERR(tt->termtbl)) {
                esw_warn(dev, "Failed to create termination table\n");
                return -EOPNOTSUPP;

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
index 8c5df6c7d7b6b98fc73c1c9750433f11190df01c..51913e2cde5cdcb88761ef87e40ab6acf4239881 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
@@ -1103,31 +1103,22 @@ EXPORT_SYMBOL(mlx5_create_lag_demux_flow_table);
 
 struct mlx5_flow_table*
 mlx5_create_auto_grouped_flow_table(struct mlx5_flow_namespace *ns,
-                                   int prio,
-                                   int num_flow_table_entries,
-                                   int max_num_groups,
-                                   u32 level,
-                                   u32 flags)
+                                   struct mlx5_flow_table_attr *ft_attr)
 {
-       struct mlx5_flow_table_attr ft_attr = {};
        struct mlx5_flow_table *ft;
 
-       if (max_num_groups > num_flow_table_entries)
+       if (ft_attr->autogroup.max_num_groups > ft_attr->max_fte)
                return ERR_PTR(-EINVAL);
 
-       ft_attr.max_fte = num_flow_table_entries;
-       ft_attr.prio    = prio;
-       ft_attr.level   = level;
-       ft_attr.flags   = flags;
-
-       ft = mlx5_create_flow_table(ns, &ft_attr);
+       ft = mlx5_create_flow_table(ns, ft_attr);
        if (IS_ERR(ft))
                return ft;
 
        ft->autogroup.active = true;
-       ft->autogroup.required_groups = max_num_groups;
+       ft->autogroup.required_groups = ft_attr->autogroup.max_num_groups;
        /* We save place for flow groups in addition to max types */
-       ft->autogroup.group_size = ft->max_fte / (max_num_groups + 1);
+       ft->autogroup.group_size = ft->max_fte /
+                                  (ft->autogroup.required_groups + 1);
 
        return ft;
 }

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fw.c b/drivers/net/ethernet/mellanox/mlx5/core/fw.c
index a19790dee7b2df6abbb3c255edde2281faa47a30..d89ff1d0911951a541daf069412ae2ebe498479c 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/fw.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fw.c
@@ -131,11 +131,11 @@ static int mlx5_get_pcam_reg(struct mlx5_core_dev *dev)
                                   MLX5_PCAM_REGS_5000_TO_507F);
 }
 
-static int mlx5_get_mcam_reg(struct mlx5_core_dev *dev)
+static int mlx5_get_mcam_access_reg_group(struct mlx5_core_dev *dev,
+                                         enum mlx5_mcam_reg_groups group)
 {
-       return mlx5_query_mcam_reg(dev, dev->caps.mcam,
-                                  MLX5_MCAM_FEATURE_ENHANCED_FEATURES,
-                                  MLX5_MCAM_REGS_FIRST_128);
+       return mlx5_query_mcam_reg(dev, dev->caps.mcam[group],
+                                  MLX5_MCAM_FEATURE_ENHANCED_FEATURES, group);
 }
 
 static int mlx5_get_qcam_reg(struct mlx5_core_dev *dev)
@@ -221,8 +221,11 @@ int mlx5_query_hca_caps(struct mlx5_core_dev *dev)
        if (MLX5_CAP_GEN(dev, pcam_reg))
                mlx5_get_pcam_reg(dev);
 
-       if (MLX5_CAP_GEN(dev, mcam_reg))
-               mlx5_get_mcam_reg(dev);
+       if (MLX5_CAP_GEN(dev, mcam_reg)) {
+               mlx5_get_mcam_access_reg_group(dev, MLX5_MCAM_REGS_FIRST_128);
+               mlx5_get_mcam_access_reg_group(dev, MLX5_MCAM_REGS_0x9080_0x90FF);
+               mlx5_get_mcam_access_reg_group(dev, MLX5_MCAM_REGS_0x9100_0x917F);
+       }
 
        if (MLX5_CAP_GEN(dev, qcam_reg))
                mlx5_get_qcam_reg(dev);
@@ -245,6 +248,13 @@ int mlx5_query_hca_caps(struct mlx5_core_dev *dev)
                        return err;
        }
 
+       if (MLX5_CAP_GEN_64(dev, general_obj_types) &
+               MLX5_GENERAL_OBJ_TYPES_CAP_VIRTIO_NET_Q) {
+               err = mlx5_core_get_caps(dev, MLX5_CAP_VDPA_EMULATION);
+               if (err)
+                       return err;
+       }
+
        return 0;
 }
 

diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h
index cc1c230f10eeb826219725375e318dad7abab3ed..0e62c3db45e5ce7a26298397b4e94d5ecda71dd7 100644 (file)
--- a/include/linux/mlx5/device.h
+++ b/include/linux/mlx5/device.h
@@ -1105,6 +1105,7 @@ enum mlx5_cap_type {
        MLX5_CAP_DEV_MEM,
        MLX5_CAP_RESERVED_16,
        MLX5_CAP_TLS,
+       MLX5_CAP_VDPA_EMULATION = 0x13,
        MLX5_CAP_DEV_EVENT = 0x14,
        /* NUM OF CAP Types */
        MLX5_CAP_NUM
@@ -1120,6 +1121,9 @@ enum mlx5_pcam_feature_groups {
 
 enum mlx5_mcam_reg_groups {
        MLX5_MCAM_REGS_FIRST_128                    = 0x0,
+       MLX5_MCAM_REGS_0x9080_0x90FF                = 0x1,
+       MLX5_MCAM_REGS_0x9100_0x917F                = 0x2,
+       MLX5_MCAM_REGS_NUM                          = 0x3,
 };
 
 enum mlx5_mcam_feature_groups {
@@ -1268,7 +1272,16 @@ enum mlx5_qcam_feature_groups {
        MLX5_GET(pcam_reg, (mdev)->caps.pcam, port_access_reg_cap_mask.regs_5000_to_507f.reg)
 
 #define MLX5_CAP_MCAM_REG(mdev, reg) \
-       MLX5_GET(mcam_reg, (mdev)->caps.mcam, mng_access_reg_cap_mask.access_regs.reg)
+       MLX5_GET(mcam_reg, (mdev)->caps.mcam[MLX5_MCAM_REGS_FIRST_128], \
+                mng_access_reg_cap_mask.access_regs.reg)
+
+#define MLX5_CAP_MCAM_REG1(mdev, reg) \
+       MLX5_GET(mcam_reg, (mdev)->caps.mcam[MLX5_MCAM_REGS_0x9080_0x90FF], \
+                mng_access_reg_cap_mask.access_regs1.reg)
+
+#define MLX5_CAP_MCAM_REG2(mdev, reg) \
+       MLX5_GET(mcam_reg, (mdev)->caps.mcam[MLX5_MCAM_REGS_0x9100_0x917F], \
+                mng_access_reg_cap_mask.access_regs2.reg)
 
 #define MLX5_CAP_MCAM_FEATURE(mdev, fld) \
        MLX5_GET(mcam_reg, (mdev)->caps.mcam, mng_feature_cap_mask.enhanced_features.fld)
@@ -1297,6 +1310,14 @@ enum mlx5_qcam_feature_groups {
 #define MLX5_CAP_DEV_EVENT(mdev, cap)\
        MLX5_ADDR_OF(device_event_cap, (mdev)->caps.hca_cur[MLX5_CAP_DEV_EVENT], cap)
 
+#define MLX5_CAP_DEV_VDPA_EMULATION(mdev, cap)\
+       MLX5_GET(device_virtio_emulation_cap, \
+               (mdev)->caps.hca_cur[MLX5_CAP_VDPA_EMULATION], cap)
+
+#define MLX5_CAP64_DEV_VDPA_EMULATION(mdev, cap)\
+       MLX5_GET64(device_virtio_emulation_cap, \
+               (mdev)->caps.hca_cur[MLX5_CAP_VDPA_EMULATION], cap)
+
 enum {
        MLX5_CMD_STAT_OK                        = 0x0,
        MLX5_CMD_STAT_INT_ERR                   = 0x1,

diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
index 59cff380f41a5f1f4bd85e9034c54ae7bdf77737..22bd0d5024c852cabd668f5544df0e9c331a49a8 100644 (file)
--- a/include/linux/mlx5/driver.h
+++ b/include/linux/mlx5/driver.h
@@ -145,6 +145,8 @@ enum {
        MLX5_REG_MCC             = 0x9062,
        MLX5_REG_MCDA            = 0x9063,
        MLX5_REG_MCAM            = 0x907f,
+       MLX5_REG_MIRC            = 0x9162,
+       MLX5_REG_RESOURCE_DUMP   = 0xC000,
 };
 
 enum mlx5_qpts_trust_state {
@@ -684,7 +686,7 @@ struct mlx5_core_dev {
                u32 hca_cur[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)];
                u32 hca_max[MLX5_CAP_NUM][MLX5_UN_SZ_DW(hca_cap_union)];
                u32 pcam[MLX5_ST_SZ_DW(pcam_reg)];
-               u32 mcam[MLX5_ST_SZ_DW(mcam_reg)];
+               u32 mcam[MLX5_MCAM_REGS_NUM][MLX5_ST_SZ_DW(mcam_reg)];
                u32 fpga[MLX5_ST_SZ_DW(fpga_cap)];
                u32 qcam[MLX5_ST_SZ_DW(qcam_reg)];
                u8  embedded_cpu;

diff --git a/include/linux/mlx5/fs.h b/include/linux/mlx5/fs.h
index 4e5b84e668225c6a86b56c5de08d1c8b2ddb1f83..a3f8b63839dee09f12ecd85bc85f5300300ef5ac 100644 (file)
--- a/include/linux/mlx5/fs.h
+++ b/include/linux/mlx5/fs.h
@@ -145,25 +145,25 @@ mlx5_get_flow_vport_acl_namespace(struct mlx5_core_dev *dev,
                                  enum mlx5_flow_namespace_type type,
                                  int vport);
 
-struct mlx5_flow_table *
-mlx5_create_auto_grouped_flow_table(struct mlx5_flow_namespace *ns,
-                                   int prio,
-                                   int num_flow_table_entries,
-                                   int max_num_groups,
-                                   u32 level,
-                                   u32 flags);
-
 struct mlx5_flow_table_attr {
        int prio;
        int max_fte;
        u32 level;
        u32 flags;
+
+       struct {
+               int max_num_groups;
+       } autogroup;
 };
 
 struct mlx5_flow_table *
 mlx5_create_flow_table(struct mlx5_flow_namespace *ns,
                       struct mlx5_flow_table_attr *ft_attr);
 
+struct mlx5_flow_table *
+mlx5_create_auto_grouped_flow_table(struct mlx5_flow_namespace *ns,
+                                   struct mlx5_flow_table_attr *ft_attr);
+
 struct mlx5_flow_table *
 mlx5_create_vport_flow_table(struct mlx5_flow_namespace *ns,
                             int prio,

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 5d54fccf87fc57484321db24111a80b5df2fcdaf..ee0a34d66c7ce5ccdbe36dfea7c9953bdc6b47b2 100644 (file)
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -87,6 +87,7 @@ enum {
 enum {
        MLX5_GENERAL_OBJ_TYPES_CAP_SW_ICM = (1ULL << MLX5_OBJ_TYPE_SW_ICM),
        MLX5_GENERAL_OBJ_TYPES_CAP_GENEVE_TLV_OPT = (1ULL << 11),
+       MLX5_GENERAL_OBJ_TYPES_CAP_VIRTIO_NET_Q = (1ULL << 13),
 };
 
 enum {
@@ -374,8 +375,17 @@ struct mlx5_ifc_flow_table_fields_supported_bits {
        u8         outer_esp_spi[0x1];
        u8         reserved_at_58[0x2];
        u8         bth_dst_qp[0x1];
+       u8         reserved_at_5b[0x5];
 
-       u8         reserved_at_5b[0x25];
+       u8         reserved_at_60[0x18];
+       u8         metadata_reg_c_7[0x1];
+       u8         metadata_reg_c_6[0x1];
+       u8         metadata_reg_c_5[0x1];
+       u8         metadata_reg_c_4[0x1];
+       u8         metadata_reg_c_3[0x1];
+       u8         metadata_reg_c_2[0x1];
+       u8         metadata_reg_c_1[0x1];
+       u8         metadata_reg_c_0[0x1];
 };
 
 struct mlx5_ifc_flow_table_prop_layout_bits {
@@ -400,7 +410,8 @@ struct mlx5_ifc_flow_table_prop_layout_bits {
        u8         reformat_l3_tunnel_to_l2[0x1];
        u8         reformat_l2_to_l3_tunnel[0x1];
        u8         reformat_and_modify_action[0x1];
-       u8         reserved_at_15[0x2];
+       u8         ignore_flow_level[0x1];
+       u8         reserved_at_16[0x1];
        u8         table_miss_action_domain[0x1];
        u8         termination_table[0x1];
        u8         reserved_at_19[0x7];
@@ -721,7 +732,9 @@ enum {
 
 struct mlx5_ifc_flow_table_eswitch_cap_bits {
        u8      fdb_to_vport_reg_c_id[0x8];
-       u8      reserved_at_8[0xf];
+       u8      reserved_at_8[0xd];
+       u8      fdb_modify_header_fwd_to_table[0x1];
+       u8      reserved_at_16[0x1];
        u8      flow_source[0x1];
        u8      reserved_at_18[0x2];
        u8      multi_fdb_encap[0x1];
@@ -822,7 +835,9 @@ struct mlx5_ifc_qos_cap_bits {
 struct mlx5_ifc_debug_cap_bits {
        u8         core_dump_general[0x1];
        u8         core_dump_qp[0x1];
-       u8         reserved_at_2[0x1e];
+       u8         reserved_at_2[0x7];
+       u8         resource_dump[0x1];
+       u8         reserved_at_a[0x16];
 
        u8         reserved_at_20[0x2];
        u8         stall_detect[0x1];
@@ -953,6 +968,19 @@ struct mlx5_ifc_device_event_cap_bits {
        u8         user_unaffiliated_events[4][0x40];
 };
 
+struct mlx5_ifc_device_virtio_emulation_cap_bits {
+       u8         reserved_at_0[0x20];
+
+       u8         reserved_at_20[0x13];
+       u8         log_doorbell_stride[0x5];
+       u8         reserved_at_38[0x3];
+       u8         log_doorbell_bar_size[0x5];
+
+       u8         doorbell_bar_offset[0x40];
+
+       u8         reserved_at_80[0x780];
+};
+
 enum {
        MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE     = 0x0,
        MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES    = 0x2,
@@ -1753,6 +1781,132 @@ struct mlx5_ifc_resize_field_select_bits {
        u8         resize_field_select[0x20];
 };
 
+struct mlx5_ifc_resource_dump_bits {
+       u8         more_dump[0x1];
+       u8         inline_dump[0x1];
+       u8         reserved_at_2[0xa];
+       u8         seq_num[0x4];
+       u8         segment_type[0x10];
+
+       u8         reserved_at_20[0x10];
+       u8         vhca_id[0x10];
+
+       u8         index1[0x20];
+
+       u8         index2[0x20];
+
+       u8         num_of_obj1[0x10];
+       u8         num_of_obj2[0x10];
+
+       u8         reserved_at_a0[0x20];
+
+       u8         device_opaque[0x40];
+
+       u8         mkey[0x20];
+
+       u8         size[0x20];
+
+       u8         address[0x40];
+
+       u8         inline_data[52][0x20];
+};
+
+struct mlx5_ifc_resource_dump_menu_record_bits {
+       u8         reserved_at_0[0x4];
+       u8         num_of_obj2_supports_active[0x1];
+       u8         num_of_obj2_supports_all[0x1];
+       u8         must_have_num_of_obj2[0x1];
+       u8         support_num_of_obj2[0x1];
+       u8         num_of_obj1_supports_active[0x1];
+       u8         num_of_obj1_supports_all[0x1];
+       u8         must_have_num_of_obj1[0x1];
+       u8         support_num_of_obj1[0x1];
+       u8         must_have_index2[0x1];
+       u8         support_index2[0x1];
+       u8         must_have_index1[0x1];
+       u8         support_index1[0x1];
+       u8         segment_type[0x10];
+
+       u8         segment_name[4][0x20];
+
+       u8         index1_name[4][0x20];
+
+       u8         index2_name[4][0x20];
+};
+
+struct mlx5_ifc_resource_dump_segment_header_bits {
+       u8         length_dw[0x10];
+       u8         segment_type[0x10];
+};
+
+struct mlx5_ifc_resource_dump_command_segment_bits {
+       struct mlx5_ifc_resource_dump_segment_header_bits segment_header;
+
+       u8         segment_called[0x10];
+       u8         vhca_id[0x10];
+
+       u8         index1[0x20];
+
+       u8         index2[0x20];
+
+       u8         num_of_obj1[0x10];
+       u8         num_of_obj2[0x10];
+};
+
+struct mlx5_ifc_resource_dump_error_segment_bits {
+       struct mlx5_ifc_resource_dump_segment_header_bits segment_header;
+
+       u8         reserved_at_20[0x10];
+       u8         syndrome_id[0x10];
+
+       u8         reserved_at_40[0x40];
+
+       u8         error[8][0x20];
+};
+
+struct mlx5_ifc_resource_dump_info_segment_bits {
+       struct mlx5_ifc_resource_dump_segment_header_bits segment_header;
+
+       u8         reserved_at_20[0x18];
+       u8         dump_version[0x8];
+
+       u8         hw_version[0x20];
+
+       u8         fw_version[0x20];
+};
+
+struct mlx5_ifc_resource_dump_menu_segment_bits {
+       struct mlx5_ifc_resource_dump_segment_header_bits segment_header;
+
+       u8         reserved_at_20[0x10];
+       u8         num_of_records[0x10];
+
+       struct mlx5_ifc_resource_dump_menu_record_bits record[0];
+};
+
+struct mlx5_ifc_resource_dump_resource_segment_bits {
+       struct mlx5_ifc_resource_dump_segment_header_bits segment_header;
+
+       u8         reserved_at_20[0x20];
+
+       u8         index1[0x20];
+
+       u8         index2[0x20];
+
+       u8         payload[0][0x20];
+};
+
+struct mlx5_ifc_resource_dump_terminate_segment_bits {
+       struct mlx5_ifc_resource_dump_segment_header_bits segment_header;
+};
+
+struct mlx5_ifc_menu_resource_dump_response_bits {
+       struct mlx5_ifc_resource_dump_info_segment_bits info;
+       struct mlx5_ifc_resource_dump_command_segment_bits cmd;
+       struct mlx5_ifc_resource_dump_menu_segment_bits menu;
+       struct mlx5_ifc_resource_dump_terminate_segment_bits terminate;
+};
+
 enum {
        MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD     = 0x1,
        MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT  = 0x2,
@@ -2026,7 +2180,9 @@ struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
 
        u8         rx_pause_transition_low[0x20];
 
-       u8         reserved_at_3c0[0x40];
+       u8         rx_discards_high[0x20];
+
+       u8         rx_discards_low[0x20];
 
        u8         device_stall_minor_watermark_cnt_high[0x20];
 
@@ -2751,6 +2907,7 @@ union mlx5_ifc_hca_cap_union_bits {
        struct mlx5_ifc_fpga_cap_bits fpga_cap;
        struct mlx5_ifc_tls_cap_bits tls_cap;
        struct mlx5_ifc_device_mem_cap_bits device_mem_cap;
+       struct mlx5_ifc_device_virtio_emulation_cap_bits virtio_emulation_cap;
        u8         reserved_at_0[0x8000];
 };
 
@@ -3998,7 +4155,8 @@ struct mlx5_ifc_set_fte_in_bits {
        u8         reserved_at_a0[0x8];
        u8         table_id[0x18];
 
-       u8         reserved_at_c0[0x18];
+       u8         ignore_flow_level[0x1];
+       u8         reserved_at_c1[0x17];
        u8         modify_enable_mask[0x8];
 
        u8         reserved_at_e0[0x20];
@@ -5466,15 +5624,32 @@ struct mlx5_ifc_add_action_in_bits {
        u8         data[0x20];
 };
 
+struct mlx5_ifc_copy_action_in_bits {
+       u8         action_type[0x4];
+       u8         src_field[0xc];
+       u8         reserved_at_10[0x3];
+       u8         src_offset[0x5];
+       u8         reserved_at_18[0x3];
+       u8         length[0x5];
+
+       u8         reserved_at_20[0x4];
+       u8         dst_field[0xc];
+       u8         reserved_at_30[0x3];
+       u8         dst_offset[0x5];
+       u8         reserved_at_38[0x8];
+};
+
 union mlx5_ifc_set_action_in_add_action_in_auto_bits {
        struct mlx5_ifc_set_action_in_bits set_action_in;
        struct mlx5_ifc_add_action_in_bits add_action_in;
+       struct mlx5_ifc_copy_action_in_bits copy_action_in;
        u8         reserved_at_0[0x40];
 };
 
 enum {
        MLX5_ACTION_TYPE_SET   = 0x1,
        MLX5_ACTION_TYPE_ADD   = 0x2,
+       MLX5_ACTION_TYPE_COPY  = 0x3,
 };
 
 enum {
@@ -5510,6 +5685,8 @@ enum {
        MLX5_ACTION_IN_FIELD_METADATA_REG_C_3  = 0x54,
        MLX5_ACTION_IN_FIELD_METADATA_REG_C_4  = 0x55,
        MLX5_ACTION_IN_FIELD_METADATA_REG_C_5  = 0x56,
+       MLX5_ACTION_IN_FIELD_METADATA_REG_C_6  = 0x57,
+       MLX5_ACTION_IN_FIELD_METADATA_REG_C_7  = 0x58,
        MLX5_ACTION_IN_FIELD_OUT_TCP_SEQ_NUM   = 0x59,
        MLX5_ACTION_IN_FIELD_OUT_TCP_ACK_NUM   = 0x5B,
 };
@@ -8406,6 +8583,18 @@ struct mlx5_ifc_pplm_reg_bits {
        u8         fec_override_admin_50g[0x4];
        u8         fec_override_admin_25g[0x4];
        u8         fec_override_admin_10g_40g[0x4];
+
+       u8         fec_override_cap_400g_8x[0x10];
+       u8         fec_override_cap_200g_4x[0x10];
+
+       u8         fec_override_cap_100g_2x[0x10];
+       u8         fec_override_cap_50g_1x[0x10];
+
+       u8         fec_override_admin_400g_8x[0x10];
+       u8         fec_override_admin_200g_4x[0x10];
+
+       u8         fec_override_admin_100g_2x[0x10];
+       u8         fec_override_admin_50g_1x[0x10];
 };
 
 struct mlx5_ifc_ppcnt_reg_bits {
@@ -8732,7 +8921,9 @@ struct mlx5_ifc_mpegc_reg_bits {
 };
 
 struct mlx5_ifc_pcam_enhanced_features_bits {
-       u8         reserved_at_0[0x6d];
+       u8         reserved_at_0[0x68];
+       u8         fec_50G_per_lane_in_pplm[0x1];
+       u8         reserved_at_69[0x4];
        u8         rx_icrc_encapsulated_counter[0x1];
        u8         reserved_at_6e[0x4];
        u8         ptys_extended_ethernet[0x1];
@@ -8817,6 +9008,28 @@ struct mlx5_ifc_mcam_access_reg_bits {
        u8         regs_31_to_0[0x20];
 };
 
+struct mlx5_ifc_mcam_access_reg_bits1 {
+       u8         regs_127_to_96[0x20];
+
+       u8         regs_95_to_64[0x20];
+
+       u8         regs_63_to_32[0x20];
+
+       u8         regs_31_to_0[0x20];
+};
+
+struct mlx5_ifc_mcam_access_reg_bits2 {
+       u8         regs_127_to_99[0x1d];
+       u8         mirc[0x1];
+       u8         regs_97_to_96[0x2];
+
+       u8         regs_95_to_64[0x20];
+
+       u8         regs_63_to_32[0x20];
+
+       u8         regs_31_to_0[0x20];
+};
+
 struct mlx5_ifc_mcam_reg_bits {
        u8         reserved_at_0[0x8];
        u8         feature_group[0x8];
@@ -8827,6 +9040,8 @@ struct mlx5_ifc_mcam_reg_bits {
 
        union {
                struct mlx5_ifc_mcam_access_reg_bits access_regs;
+               struct mlx5_ifc_mcam_access_reg_bits1 access_regs1;
+               struct mlx5_ifc_mcam_access_reg_bits2 access_regs2;
                u8         reserved_at_0[0x80];
        } mng_access_reg_cap_mask;
 
@@ -9432,6 +9647,13 @@ struct mlx5_ifc_mcda_reg_bits {
        u8         data[0][0x20];
 };
 
+struct mlx5_ifc_mirc_reg_bits {
+       u8         reserved_at_0[0x18];
+       u8         status_code[0x8];
+
+       u8         reserved_at_20[0x20];
+};
+
 union mlx5_ifc_ports_control_registers_document_bits {
        struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
        struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
@@ -9487,6 +9709,7 @@ union mlx5_ifc_ports_control_registers_document_bits {
        struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
        struct mlx5_ifc_mcc_reg_bits mcc_reg;
        struct mlx5_ifc_mcda_reg_bits mcda_reg;
+       struct mlx5_ifc_mirc_reg_bits mirc_reg;
        u8         reserved_at_0[0x60e0];
 };