drm/kmb: Remove clearing DPHY regs

Don't clear the shared DPHY registers common to MIPI Rx and MIPI Tx during
DSI initialization since this was causing MIPI Rx reset. Rest of the
writes are bitwise, so will not affect Mipi Rx side.

Fixes: 98521f4d4b4c ("drm/kmb: Mipi DSI part of the display driver")
Signed-off-by: Edmund Dea <edmund.j.dea@intel.com>
Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211013233632.471892-3-anitha.chrisanthus@intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

diff --git a/drivers/gpu/drm/kmb/kmb_dsi.c b/drivers/gpu/drm/kmb/kmb_dsi.c
index 86e8e7943e896886760a2156b9741ffd00e058e2..a0669b842ff5f4f0390425187f40a3219787c243 100644 (file)
--- a/drivers/gpu/drm/kmb/kmb_dsi.c
+++ b/drivers/gpu/drm/kmb/kmb_dsi.c
@@ -1393,11 +1393,6 @@ int kmb_dsi_mode_set(struct kmb_dsi *kmb_dsi, struct drm_display_mode *mode,
                mipi_tx_init_cfg.lane_rate_mbps = data_rate;
        }
 
-       kmb_write_mipi(kmb_dsi, DPHY_ENABLE, 0);
-       kmb_write_mipi(kmb_dsi, DPHY_INIT_CTRL0, 0);
-       kmb_write_mipi(kmb_dsi, DPHY_INIT_CTRL1, 0);
-       kmb_write_mipi(kmb_dsi, DPHY_INIT_CTRL2, 0);
-
        /* Initialize mipi controller */
        mipi_tx_init_cntrl(kmb_dsi, &mipi_tx_init_cfg);