[ARM] S3C: Move plat/regs-spi.h to arch/arm/plat-s3c/include/plat.

Move plat/regs-spi.h to arch/arm/plat-s3c/include/plat ready
ready to clean out old include directories.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>

diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index 7fa77effccf828e7bd2f1099bedcce3238bab54b..30983cc612df1b7881d347f1a874919edde95082 100644 (file)
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -30,7 +30,7 @@
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
 #include <asm/plat-s3c24xx/regs-iis.h>
-#include <asm/plat-s3c24xx/regs-spi.h>
+#include <plat/regs-spi.h>
 
 static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
        [DMACH_XD0] = {

diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c
index 7db581826676938a258fa67dd8738efb2737b2d3..f8b2dd4a363201e1da8aebec8a80e27b9b46bcbc 100644 (file)
--- a/arch/arm/mach-s3c2412/dma.c
+++ b/arch/arm/mach-s3c2412/dma.c
@@ -32,7 +32,7 @@
 #include <mach/regs-sdi.h>
 #include <asm/plat-s3c24xx/regs-s3c2412-iis.h>
 #include <asm/plat-s3c24xx/regs-iis.h>
-#include <asm/plat-s3c24xx/regs-spi.h>
+#include <plat/regs-spi.h>
 
 #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
 

diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c
index 313759c3da69fcc0ba4f357342f2191475a9ed4b..a086818e117e80e585d184714f3f4cc0aeb81bcc 100644 (file)
--- a/arch/arm/mach-s3c2412/s3c2412.c
+++ b/arch/arm/mach-s3c2412/s3c2412.c
@@ -39,7 +39,7 @@
 #include <mach/regs-gpio.h>
 #include <mach/regs-gpioj.h>
 #include <mach/regs-dsc.h>
-#include <asm/plat-s3c24xx/regs-spi.h>
+#include <plat/regs-spi.h>
 #include <mach/regs-s3c2412.h>
 
 #include <plat/s3c2412.h>

diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c
index 00d88782b23b936797a1e5084064637c7f389553..53be553bfc216d4bdda4cea0aa1975001b47f82c 100644 (file)
--- a/arch/arm/mach-s3c2440/dma.c
+++ b/arch/arm/mach-s3c2440/dma.c
@@ -30,7 +30,7 @@
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
 #include <asm/plat-s3c24xx/regs-iis.h>
-#include <asm/plat-s3c24xx/regs-spi.h>
+#include <plat/regs-spi.h>
 
 static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = {
        [DMACH_XD0] = {

diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c
index 4185c57b5dd06aef8c3130de8536e9f87aed4184..872482f026856a09c40222af16aa7d74a96c6f93 100644 (file)
--- a/arch/arm/mach-s3c2443/dma.c
+++ b/arch/arm/mach-s3c2443/dma.c
@@ -31,7 +31,7 @@
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
 #include <asm/plat-s3c24xx/regs-iis.h>
-#include <asm/plat-s3c24xx/regs-spi.h>
+#include <plat/regs-spi.h>
 
 #define MAP(x) { \
                [0]     = (x) | DMA_CH_VALID,   \

diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index 07491bcd13ba96ae362a1167fb04b85e065ba2df..adf535aaf43a20b00342ad139eb58529f609d6b7 100644 (file)
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -33,7 +33,7 @@
 
 #include <plat/devs.h>
 #include <plat/cpu.h>
-#include <asm/plat-s3c24xx/regs-spi.h>
+#include <plat/regs-spi.h>
 
 /* Serial port registrations */
 

diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-spi.h b/arch/arm/plat-s3c24xx/include/plat/regs-spi.h
new file mode 100644 (file)
index 0000000..2b35479
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/regs-spi.h
@@ -0,0 +1,82 @@
+/* arch/arm/mach-s3c2410/include/mach/regs-spi.h
+ *
+ * Copyright (c) 2004 Fetron GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2410 SPI register definition
+*/
+
+#ifndef __ASM_ARCH_REGS_SPI_H
+#define __ASM_ARCH_REGS_SPI_H
+
+#define S3C2410_SPI1   (0x20)
+#define S3C2412_SPI1   (0x100)
+
+#define S3C2410_SPCON  (0x00)
+
+#define S3C2412_SPCON_RXFIFO_RB2       (0<<14)
+#define S3C2412_SPCON_RXFIFO_RB4       (1<<14)
+#define S3C2412_SPCON_RXFIFO_RB12      (2<<14)
+#define S3C2412_SPCON_RXFIFO_RB14      (3<<14)
+#define S3C2412_SPCON_TXFIFO_RB2       (0<<12)
+#define S3C2412_SPCON_TXFIFO_RB4       (1<<12)
+#define S3C2412_SPCON_TXFIFO_RB12      (2<<12)
+#define S3C2412_SPCON_TXFIFO_RB14      (3<<12)
+#define S3C2412_SPCON_RXFIFO_RESET     (1<<11) /* RxFIFO reset */
+#define S3C2412_SPCON_TXFIFO_RESET     (1<<10) /* TxFIFO reset */
+#define S3C2412_SPCON_RXFIFO_EN                (1<<9)  /* RxFIFO Enable */
+#define S3C2412_SPCON_TXFIFO_EN                (1<<8)  /* TxFIFO Enable */
+
+#define S3C2412_SPCON_DIRC_RX    (1<<7)
+
+#define S3C2410_SPCON_SMOD_DMA   (2<<5)        /* DMA mode */
+#define S3C2410_SPCON_SMOD_INT   (1<<5)        /* interrupt mode */
+#define S3C2410_SPCON_SMOD_POLL   (0<<5)       /* polling mode */
+#define S3C2410_SPCON_ENSCK      (1<<4)        /* Enable SCK */
+#define S3C2410_SPCON_MSTR       (1<<3)        /* Master/Slave select
+                                                  0: slave, 1: master */
+#define S3C2410_SPCON_CPOL_HIGH          (1<<2)        /* Clock polarity select */
+#define S3C2410_SPCON_CPOL_LOW   (0<<2)        /* Clock polarity select */
+
+#define S3C2410_SPCON_CPHA_FMTB          (1<<1)        /* Clock Phase Select */
+#define S3C2410_SPCON_CPHA_FMTA          (0<<1)        /* Clock Phase Select */
+
+#define S3C2410_SPCON_TAGD       (1<<0)        /* Tx auto garbage data mode */
+
+
+#define S3C2410_SPSTA   (0x04)
+
+#define S3C2412_SPSTA_RXFIFO_AE                (1<<11)
+#define S3C2412_SPSTA_TXFIFO_AE                (1<<10)
+#define S3C2412_SPSTA_RXFIFO_ERROR     (1<<9)
+#define S3C2412_SPSTA_TXFIFO_ERROR     (1<<8)
+#define S3C2412_SPSTA_RXFIFO_FIFO      (1<<7)
+#define S3C2412_SPSTA_RXFIFO_EMPTY     (1<<6)
+#define S3C2412_SPSTA_TXFIFO_NFULL     (1<<5)
+#define S3C2412_SPSTA_TXFIFO_EMPTY     (1<<4)
+
+#define S3C2410_SPSTA_DCOL       (1<<2)        /* Data Collision Error */
+#define S3C2410_SPSTA_MULD       (1<<1)        /* Multi Master Error */
+#define S3C2410_SPSTA_READY      (1<<0)        /* Data Tx/Rx ready */
+#define S3C2412_SPSTA_READY_ORG          (1<<3)
+
+#define S3C2410_SPPIN   (0x08)
+
+#define S3C2410_SPPIN_ENMUL      (1<<2)        /* Multi Master Error detect */
+#define S3C2410_SPPIN_RESERVED   (1<<1)
+#define S3C2400_SPPIN_nCS        (1<<1)        /* SPI Card Select */
+#define S3C2410_SPPIN_KEEP       (1<<0)        /* Master Out keep */
+
+#define S3C2410_SPPRE   (0x0C)
+#define S3C2410_SPTDAT  (0x10)
+#define S3C2410_SPRDAT  (0x14)
+
+#define S3C2412_TXFIFO  (0x18)
+#define S3C2412_RXFIFO  (0x18)
+#define S3C2412_SPFIC   (0x24)
+
+
+#endif /* __ASM_ARCH_REGS_SPI_H */

diff --git a/drivers/spi/spi_s3c24xx.c b/drivers/spi/spi_s3c24xx.c
index c252cbac00f1d14ef273f53dea2ca7f39edd38b5..256d18395a23bdf971589793b0e205a6da839039 100644 (file)
--- a/drivers/spi/spi_s3c24xx.c
+++ b/drivers/spi/spi_s3c24xx.c
@@ -28,7 +28,7 @@
 #include <mach/hardware.h>
 
 #include <mach/regs-gpio.h>
-#include <asm/plat-s3c24xx/regs-spi.h>
+#include <plat/regs-spi.h>
 #include <mach/spi.h>
 
 struct s3c24xx_spi {

diff --git a/include/asm-arm/plat-s3c24xx/regs-spi.h b/include/asm-arm/plat-s3c24xx/regs-spi.h
deleted file mode 100644 (file)
index 2b35479..0000000
--- a/include/asm-arm/plat-s3c24xx/regs-spi.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/regs-spi.h
- *
- * Copyright (c) 2004 Fetron GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C2410 SPI register definition
-*/
-
-#ifndef __ASM_ARCH_REGS_SPI_H
-#define __ASM_ARCH_REGS_SPI_H
-
-#define S3C2410_SPI1   (0x20)
-#define S3C2412_SPI1   (0x100)
-
-#define S3C2410_SPCON  (0x00)
-
-#define S3C2412_SPCON_RXFIFO_RB2       (0<<14)
-#define S3C2412_SPCON_RXFIFO_RB4       (1<<14)
-#define S3C2412_SPCON_RXFIFO_RB12      (2<<14)
-#define S3C2412_SPCON_RXFIFO_RB14      (3<<14)
-#define S3C2412_SPCON_TXFIFO_RB2       (0<<12)
-#define S3C2412_SPCON_TXFIFO_RB4       (1<<12)
-#define S3C2412_SPCON_TXFIFO_RB12      (2<<12)
-#define S3C2412_SPCON_TXFIFO_RB14      (3<<12)
-#define S3C2412_SPCON_RXFIFO_RESET     (1<<11) /* RxFIFO reset */
-#define S3C2412_SPCON_TXFIFO_RESET     (1<<10) /* TxFIFO reset */
-#define S3C2412_SPCON_RXFIFO_EN                (1<<9)  /* RxFIFO Enable */
-#define S3C2412_SPCON_TXFIFO_EN                (1<<8)  /* TxFIFO Enable */
-
-#define S3C2412_SPCON_DIRC_RX    (1<<7)
-
-#define S3C2410_SPCON_SMOD_DMA   (2<<5)        /* DMA mode */
-#define S3C2410_SPCON_SMOD_INT   (1<<5)        /* interrupt mode */
-#define S3C2410_SPCON_SMOD_POLL   (0<<5)       /* polling mode */
-#define S3C2410_SPCON_ENSCK      (1<<4)        /* Enable SCK */
-#define S3C2410_SPCON_MSTR       (1<<3)        /* Master/Slave select
-                                                  0: slave, 1: master */
-#define S3C2410_SPCON_CPOL_HIGH          (1<<2)        /* Clock polarity select */
-#define S3C2410_SPCON_CPOL_LOW   (0<<2)        /* Clock polarity select */
-
-#define S3C2410_SPCON_CPHA_FMTB          (1<<1)        /* Clock Phase Select */
-#define S3C2410_SPCON_CPHA_FMTA          (0<<1)        /* Clock Phase Select */
-
-#define S3C2410_SPCON_TAGD       (1<<0)        /* Tx auto garbage data mode */
-
-
-#define S3C2410_SPSTA   (0x04)
-
-#define S3C2412_SPSTA_RXFIFO_AE                (1<<11)
-#define S3C2412_SPSTA_TXFIFO_AE                (1<<10)
-#define S3C2412_SPSTA_RXFIFO_ERROR     (1<<9)
-#define S3C2412_SPSTA_TXFIFO_ERROR     (1<<8)
-#define S3C2412_SPSTA_RXFIFO_FIFO      (1<<7)
-#define S3C2412_SPSTA_RXFIFO_EMPTY     (1<<6)
-#define S3C2412_SPSTA_TXFIFO_NFULL     (1<<5)
-#define S3C2412_SPSTA_TXFIFO_EMPTY     (1<<4)
-
-#define S3C2410_SPSTA_DCOL       (1<<2)        /* Data Collision Error */
-#define S3C2410_SPSTA_MULD       (1<<1)        /* Multi Master Error */
-#define S3C2410_SPSTA_READY      (1<<0)        /* Data Tx/Rx ready */
-#define S3C2412_SPSTA_READY_ORG          (1<<3)
-
-#define S3C2410_SPPIN   (0x08)
-
-#define S3C2410_SPPIN_ENMUL      (1<<2)        /* Multi Master Error detect */
-#define S3C2410_SPPIN_RESERVED   (1<<1)
-#define S3C2400_SPPIN_nCS        (1<<1)        /* SPI Card Select */
-#define S3C2410_SPPIN_KEEP       (1<<0)        /* Master Out keep */
-
-#define S3C2410_SPPRE   (0x0C)
-#define S3C2410_SPTDAT  (0x10)
-#define S3C2410_SPRDAT  (0x14)
-
-#define S3C2412_TXFIFO  (0x18)
-#define S3C2412_RXFIFO  (0x18)
-#define S3C2412_SPFIC   (0x24)
-
-
-#endif /* __ASM_ARCH_REGS_SPI_H */