drm/nv40: initialise 0x17xx on all chipsets that have it

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/nv40_mc.c b/drivers/gpu/drm/nouveau/nv40_mc.c
index e4e72c12ab6ac3c10a73661b5be8a871101bf714..03c0d4c3f3558314bdce37769b9840d03928b93c 100644 (file)
--- a/drivers/gpu/drm/nouveau/nv40_mc.c
+++ b/drivers/gpu/drm/nouveau/nv40_mc.c
@@ -6,27 +6,17 @@
 int
 nv40_mc_init(struct drm_device *dev)
 {
-       struct drm_nouveau_private *dev_priv = dev->dev_private;
-       uint32_t tmp;
-
        /* Power up everything, resetting each individual unit will
         * be done later if needed.
         */
        nv_wr32(dev, NV03_PMC_ENABLE, 0xFFFFFFFF);
 
-       switch (dev_priv->chipset) {
-       case 0x44:
-       case 0x46: /* G72 */
-       case 0x4e:
-       case 0x4c: /* C51_G7X */
-               tmp = nv_rd32(dev, NV04_PFB_FIFO_DATA);
+       if (nv44_graph_class(dev)) {
+               u32 tmp = nv_rd32(dev, NV04_PFB_FIFO_DATA);
                nv_wr32(dev, NV40_PMC_1700, tmp);
                nv_wr32(dev, NV40_PMC_1704, 0);
                nv_wr32(dev, NV40_PMC_1708, 0);
                nv_wr32(dev, NV40_PMC_170C, tmp);
-               break;
-       default:
-               break;
        }
 
        return 0;