drm/i915: Fix fastset vs. pfit on/off on HSW EDP transcoder

On HSW the pipe A panel fitter lives inside the display power well,
and the input MUX for the EDP transcoder needs to be configured
appropriately to route the data through the power well as needed.
Changing the MUX setting is not allowed while the pipe is active,
so we need to force a full modeset whenever we need to change it.

Currently we may end up doing a fastset which won't change the
MUX settings, but it will drop the power well reference, and that
kills the pipe.

Cc: stable@vger.kernel.org
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Fixes: d19f958db23c ("drm/i915: Enable fastset for non-boot modesets.")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190425162906.5242-1-ville.syrjala@linux.intel.com
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index b83eeabed79457305bf269a7fd8bfdb627e5e893..a57c98817938998f9b3ff1602c91faeb3c68f4f1 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11937,6 +11937,7 @@ intel_pipe_config_compare(struct drm_i915_private *dev_priv,
                          struct intel_crtc_state *pipe_config,
                          bool adjust)
 {
+       struct intel_crtc *crtc = to_intel_crtc(current_config->base.crtc);
        bool ret = true;
        bool fixup_inherited = adjust &&
                (current_config->base.mode.private_flags & I915_MODE_FLAG_INHERITED) &&
@@ -12158,6 +12159,14 @@ intel_pipe_config_compare(struct drm_i915_private *dev_priv,
                PIPE_CONF_CHECK_X(gmch_pfit.pgm_ratios);
        PIPE_CONF_CHECK_X(gmch_pfit.lvds_border_bits);
 
+       /*
+        * Changing the EDP transcoder input mux
+        * (A_ONOFF vs. A_ON) requires a full modeset.
+        */
+       if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A &&
+           current_config->cpu_transcoder == TRANSCODER_EDP)
+               PIPE_CONF_CHECK_BOOL(pch_pfit.enabled);
+
        if (!adjust) {
                PIPE_CONF_CHECK_I(pipe_src_w);
                PIPE_CONF_CHECK_I(pipe_src_h);

diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c b/drivers/gpu/drm/i915/intel_pipe_crc.c
index 337600f0f3593f95f46431a753a34f420c4884a4..40f978ac07ca596f5c01c3b0a069247f55fe6572 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pipe_crc.c
+++ b/drivers/gpu/drm/i915/intel_pipe_crc.c
@@ -312,10 +312,17 @@ retry:
        pipe_config->base.mode_changed = pipe_config->has_psr;
        pipe_config->crc_enabled = enable;
 
-       if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A) {
+       if (IS_HASWELL(dev_priv) &&
+           pipe_config->base.active && crtc->pipe == PIPE_A &&
+           pipe_config->cpu_transcoder == TRANSCODER_EDP) {
+               bool old_need_power_well = pipe_config->pch_pfit.enabled ||
+                       pipe_config->pch_pfit.force_thru;
+               bool new_need_power_well = pipe_config->pch_pfit.enabled ||
+                       enable;
+
                pipe_config->pch_pfit.force_thru = enable;
-               if (pipe_config->cpu_transcoder == TRANSCODER_EDP &&
-                   pipe_config->pch_pfit.enabled != enable)
+
+               if (old_need_power_well != new_need_power_well)
                        pipe_config->base.connectors_changed = true;
        }