]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/commitdiff
PCI: Restore Resizable BAR size bits correctly for 1MB BARs
authorSumit Saxena <sumit.saxena@broadcom.com>
Mon, 9 Sep 2019 11:08:34 +0000 (14:08 +0300)
committerPaolo Pisati <paolo.pisati@canonical.com>
Mon, 16 Sep 2019 13:07:02 +0000 (15:07 +0200)
BugLink: http://bugs.launchpad.net/bugs/1838751
In a Resizable BAR Control Register, bits 13:8 control the size of the BAR.
The encoded values of these bits are as follows (see PCIe r5.0, sec
7.8.6.3):

  Value    BAR size
     0     1 MB (2^20 bytes)
     1     2 MB (2^21 bytes)
     2     4 MB (2^22 bytes)
   ...
    43     8 EB (2^63 bytes)

Previously we incorrectly set the BAR size bits for a 1 MB BAR to 0x1f
instead of 0, so devices that support that size, e.g., new megaraid_sas and
mpt3sas adapters, fail to initialize during resume from S3 sleep.

Correctly calculate the BAR size bits for Resizable BAR control registers.

Link: https://lore.kernel.org/r/20190725192552.24295-1-sumit.saxena@broadcom.com
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=203939
Fixes: d3252ace0bc6 ("PCI: Restore resized BAR state on resume")
Signed-off-by: Sumit Saxena <sumit.saxena@broadcom.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org # v4.19+
(cherry-picked from d2182b2d4b71ff0549a07f414d921525fade707b linux-next)
Signed-off-by: Timo Aaltonen <timo.aaltonen@canonical.com>
Signed-off-by: Seth Forshee <seth.forshee@canonical.com>
drivers/pci/pci.c

index 1b27b5af3d552f8622b075c80dd365561347ec6e..7f61d7b7f280b1dd3e5d3cc48345173634078327 100644 (file)
@@ -1443,7 +1443,7 @@ static void pci_restore_rebar_state(struct pci_dev *pdev)
                pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);
                bar_idx = ctrl & PCI_REBAR_CTRL_BAR_IDX;
                res = pdev->resource + bar_idx;
-               size = order_base_2((resource_size(res) >> 20) | 1) - 1;
+               size = ilog2(resource_size(res)) - 20;
                ctrl &= ~PCI_REBAR_CTRL_BAR_SIZE;
                ctrl |= size << PCI_REBAR_CTRL_BAR_SHIFT;
                pci_write_config_dword(pdev, pos + PCI_REBAR_CTRL, ctrl);