x86/msr-index: Add MSRs for XFD

BugLink: https://bugs.launchpad.net/bugs/1967750
XFD introduces two MSRs:

    - IA32_XFD to enable/disable a feature controlled by XFD

    - IA32_XFD_ERR to expose to the #NM trap handler which feature
      was tried to be used for the first time.

Both use the same xstate-component bitmap format, used by XCR0.

Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20211021225527.10184-14-chang.seok.bae@intel.com
(cherry picked from commit dae1bd58389615d401a84aedc38fa075ef8f7de6)
Acked-by: Dimitri John Ledkov <dimitri.ledkov@canonical.com>
Signed-off-by: Andrea Righi <andrea.righi@canonical.com>

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index a7c413432b33d85a081dbb227a799035221fb256..01e2650b958591e0a54dbc3205c7d56eaf89e22d 100644 (file)
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -625,6 +625,8 @@
 
 #define MSR_IA32_BNDCFGS_RSVD          0x00000ffc
 
+#define MSR_IA32_XFD                   0x000001c4
+#define MSR_IA32_XFD_ERR               0x000001c5
 #define MSR_IA32_XSS                   0x00000da0
 
 #define MSR_IA32_APICBASE              0x0000001b