qemu_set_irq(env->irq_inputs[env->config->timerint[i]], 1);
}
+static void xtensa_set_runstall(void *opaque, int irq, int active)
+{
+ CPUXtensaState *env = opaque;
+ xtensa_runstall(env, active);
+}
+
void xtensa_irq_init(CPUXtensaState *env)
{
unsigned i;
env->ext_irq_inputs[i] = env->irq_inputs[irq];
}
+ env->runstall_irq = qemu_allocate_irq(xtensa_set_runstall, env, 0);
}
qemu_irq *xtensa_get_extints(CPUXtensaState *env)
{
return env->ext_irq_inputs;
}
+
+qemu_irq xtensa_get_runstall(CPUXtensaState *env)
+{
+ return env->runstall_irq;
+}
int pending_irq_level; /* level of last raised IRQ */
qemu_irq *irq_inputs;
qemu_irq ext_irq_inputs[MAX_NINTERRUPT];
+ qemu_irq runstall_irq;
XtensaCcompareTimer ccompare[MAX_NCCOMPARE];
uint64_t time_base;
uint64_t ccount_time;
void check_interrupts(CPUXtensaState *s);
void xtensa_irq_init(CPUXtensaState *env);
qemu_irq *xtensa_get_extints(CPUXtensaState *env);
+qemu_irq xtensa_get_runstall(CPUXtensaState *env);
int cpu_xtensa_signal_handler(int host_signum, void *pinfo, void *puc);
void xtensa_cpu_list(FILE *f, fprintf_function cpu_fprintf);
void xtensa_sync_window_from_phys(CPUXtensaState *env);