drm/radeon/kms: implement gpu lockup check for evergreen

Now that soft reset works, we can add this.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index ec641ce647643d03f0f33c360ad43ec40f5e8f27..3ae63ceb9c334f86576243c1f52a8e109b6cbf4a 100644 (file)
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -2085,8 +2085,30 @@ int evergreen_mc_init(struct radeon_device *rdev)
 
 bool evergreen_gpu_is_lockup(struct radeon_device *rdev)
 {
-       /* FIXME: implement for evergreen */
-       return false;
+       u32 srbm_status;
+       u32 grbm_status;
+       u32 grbm_status_se0, grbm_status_se1;
+       struct r100_gpu_lockup *lockup = &rdev->config.evergreen.lockup;
+       int r;
+
+       srbm_status = RREG32(SRBM_STATUS);
+       grbm_status = RREG32(GRBM_STATUS);
+       grbm_status_se0 = RREG32(GRBM_STATUS_SE0);
+       grbm_status_se1 = RREG32(GRBM_STATUS_SE1);
+       if (!(grbm_status & GUI_ACTIVE)) {
+               r100_gpu_lockup_update(lockup, &rdev->cp);
+               return false;
+       }
+       /* force CP activities */
+       r = radeon_ring_lock(rdev, 2);
+       if (!r) {
+               /* PACKET2 NOP */
+               radeon_ring_write(rdev, 0x80000000);
+               radeon_ring_write(rdev, 0x80000000);
+               radeon_ring_unlock_commit(rdev);
+       }
+       rdev->cp.rptr = RREG32(CP_RB_RPTR);
+       return r100_gpu_cp_is_lockup(rdev, lockup, &rdev->cp);
 }
 
 static int evergreen_gpu_soft_reset(struct radeon_device *rdev)

diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 431d4186ddf0c1559029294252178f5ef60d1c21..d2697f8f2da8868627b2df52ab595fb05f34c4c4 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1031,6 +1031,7 @@ struct evergreen_asic {
        unsigned tiling_npipes;
        unsigned tiling_group_size;
        unsigned tile_config;
+       struct r100_gpu_lockup  lockup;
 };
 
 union radeon_asic_config {