MIPS: DTS: Fix number of msi vectors for Loongson64G

HT irqs vectors are 8 groups, each group has 32 irqs, Loongson64C CPUs
can use only 4 groups and Loongson64G CPUs can use all 8 groups. So the
number of msi vectors of Loongson64G is 192 (32*8 - 64 = 192).

Fixes: 24af105962c8004edb9f5bf84 ("MIPS: Loongson64: DeviceTree for LS7A PCH")
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

diff --git a/arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts b/arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts
index bdc911e21ebfbd0a7b6b4359afc60742cbd36cf8..c945f8565d5434b235f2124ec7604ebb77bff488 100644 (file)
--- a/arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts
+++ b/arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts
@@ -20,7 +20,11 @@
                interrupts = <24 IRQ_TYPE_LEVEL_HIGH>,
                             <25 IRQ_TYPE_LEVEL_HIGH>,
                             <26 IRQ_TYPE_LEVEL_HIGH>,
-                            <27 IRQ_TYPE_LEVEL_HIGH>;
+                            <27 IRQ_TYPE_LEVEL_HIGH>,
+                            <28 IRQ_TYPE_LEVEL_HIGH>,
+                            <29 IRQ_TYPE_LEVEL_HIGH>,
+                            <30 IRQ_TYPE_LEVEL_HIGH>,
+                            <31 IRQ_TYPE_LEVEL_HIGH>;
        };
 };
 
@@ -31,7 +35,7 @@
                interrupt-controller;
                msi-controller;
                loongson,msi-base-vec = <64>;
-               loongson,msi-num-vecs = <128>;
+               loongson,msi-num-vecs = <192>;
                interrupt-parent = <&htvec>;
        };
 };