}
addr.data = origin->address & VTD_MSI_ADDR_LO_MASK;
- if (le16_to_cpu(addr.addr.__head) != 0xfee) {
+ if (addr.addr.__head != 0xfee) {
VTD_DPRINTF(GENERAL, "error: MSI addr low 32 bits invalid: "
"0x%"PRIx32, addr.data);
return -VTD_FR_IR_REQ_RSVD;
union VTD_IR_TableEntry {
struct {
#ifdef HOST_WORDS_BIGENDIAN
- uint32_t dest_id:32; /* Destination ID */
uint32_t __reserved_1:8; /* Reserved 1 */
uint32_t vector:8; /* Interrupt Vector */
uint32_t irte_mode:1; /* IRTE Mode */
uint32_t irte_mode:1; /* IRTE Mode */
uint32_t vector:8; /* Interrupt Vector */
uint32_t __reserved_1:8; /* Reserved 1 */
- uint32_t dest_id:32; /* Destination ID */
#endif
- uint16_t source_id:16; /* Source-ID */
+ uint32_t dest_id; /* Destination ID */
+ uint16_t source_id; /* Source-ID */
#ifdef HOST_WORDS_BIGENDIAN
uint64_t __reserved_2:44; /* Reserved 2 */
uint64_t sid_vtype:2; /* Source-ID Validation Type */
uint32_t dest:8;
uint32_t __addr_head:12; /* 0xfee */
#endif
- uint32_t __addr_hi:32;
+ uint32_t __addr_hi;
} QEMU_PACKED;
uint64_t msi_addr;
};
uint16_t level:1;
uint16_t trigger_mode:1;
#endif
- uint16_t __resved1:16;
+ uint16_t __resved1;
} QEMU_PACKED;
uint32_t msi_data;
};