]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/commitdiff
Revert "UBUNTU: SAUCE: {topost} net: hns3: fix unreasonable code comments"
authordann frazier <dann.frazier@canonical.com>
Thu, 16 Aug 2018 19:19:26 +0000 (13:19 -0600)
committerKleber Sacilotto de Souza <kleber.souza@canonical.com>
Wed, 5 Sep 2018 12:18:33 +0000 (14:18 +0200)
BugLink: https://bugs.launchpad.net/bugs/1787477
This reverts commit ec7a62b9d265a09ec7002ce5e5190c327d97e907.
Signed-off-by: dann frazier <dann.frazier@canonical.com>
Acked-by: Stefan Bader <stefan.bader@canonical.com>
Acked-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>
Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h

index 8a458ff0059c5dd80de71e8c6afe372a32973f4a..a7065798f61f0fd372dac3a3f8083d5ce397c8c1 100644 (file)
@@ -71,7 +71,7 @@ struct hclge_misc_vector {
 struct hclge_cmq {
        struct hclge_cmq_ring csq;
        struct hclge_cmq_ring crq;
-       u16 tx_timeout;
+       u16 tx_timeout; /* Tx timeout */
        enum hclge_cmd_status last_status;
 };
 
@@ -90,7 +90,7 @@ struct hclge_cmq {
 #define HCLGE_CMD_FLAG_ERR_INTR        BIT(HCLGE_CMD_FLAG_ERR_INTR_SHIFT)
 
 enum hclge_opcode_type {
-       /* Generic commands */
+       /* Generic command */
        HCLGE_OPC_QUERY_FW_VER          = 0x0001,
        HCLGE_OPC_CFG_RST_TRIGGER       = 0x0020,
        HCLGE_OPC_GBL_RST_STATUS        = 0x0021,
@@ -106,8 +106,9 @@ enum hclge_opcode_type {
        HCLGE_OPC_QUERY_REG_NUM         = 0x0040,
        HCLGE_OPC_QUERY_32_BIT_REG      = 0x0041,
        HCLGE_OPC_QUERY_64_BIT_REG      = 0x0042,
+       /* Device management command */
 
-       /* MAC command */
+       /* MAC commond */
        HCLGE_OPC_CONFIG_MAC_MODE       = 0x0301,
        HCLGE_OPC_CONFIG_AN_MODE        = 0x0304,
        HCLGE_OPC_QUERY_AN_RESULT       = 0x0306,
@@ -115,8 +116,9 @@ enum hclge_opcode_type {
        HCLGE_OPC_CONFIG_MAX_FRM_SIZE   = 0x0308,
        HCLGE_OPC_CONFIG_SPEED_DUP      = 0x0309,
        HCLGE_OPC_SERDES_LOOPBACK       = 0x0315,
+       /* MACSEC command */
 
-       /* PFC/Pause commands*/
+       /* PFC/Pause CMD*/
        HCLGE_OPC_CFG_MAC_PAUSE_EN      = 0x0701,
        HCLGE_OPC_CFG_PFC_PAUSE_EN      = 0x0702,
        HCLGE_OPC_CFG_MAC_PARA          = 0x0703,
@@ -147,7 +149,7 @@ enum hclge_opcode_type {
        HCLGE_OPC_TM_QS_SCH_MODE_CFG    = 0x0814,
        HCLGE_OPC_TM_BP_TO_QSET_MAPPING = 0x0815,
 
-       /* Packet buffer allocate commands */
+       /* Packet buffer allocate command */
        HCLGE_OPC_TX_BUFF_ALLOC         = 0x0901,
        HCLGE_OPC_RX_PRIV_BUFF_ALLOC    = 0x0902,
        HCLGE_OPC_RX_PRIV_WL_ALLOC      = 0x0903,
@@ -155,10 +157,11 @@ enum hclge_opcode_type {
        HCLGE_OPC_RX_COM_WL_ALLOC       = 0x0905,
        HCLGE_OPC_RX_GBL_PKT_CNT        = 0x0906,
 
+       /* PTP command */
        /* TQP management command */
        HCLGE_OPC_SET_TQP_MAP           = 0x0A01,
 
-       /* TQP commands */
+       /* TQP command */
        HCLGE_OPC_CFG_TX_QUEUE          = 0x0B01,
        HCLGE_OPC_QUERY_TX_POINTER      = 0x0B02,
        HCLGE_OPC_QUERY_TX_STATUS       = 0x0B03,
@@ -170,10 +173,10 @@ enum hclge_opcode_type {
        HCLGE_OPC_CFG_COM_TQP_QUEUE     = 0x0B20,
        HCLGE_OPC_RESET_TQP_QUEUE       = 0x0B22,
 
-       /* TSO command */
+       /* TSO cmd */
        HCLGE_OPC_TSO_GENERIC_CONFIG    = 0x0C01,
 
-       /* RSS commands */
+       /* RSS cmd */
        HCLGE_OPC_RSS_GENERIC_CONFIG    = 0x0D01,
        HCLGE_OPC_RSS_INDIR_TABLE       = 0x0D07,
        HCLGE_OPC_RSS_TC_MODE           = 0x0D08,
@@ -182,15 +185,15 @@ enum hclge_opcode_type {
        /* Promisuous mode command */
        HCLGE_OPC_CFG_PROMISC_MODE      = 0x0E01,
 
-       /* Vlan offload commands */
+       /* Vlan offload command */
        HCLGE_OPC_VLAN_PORT_TX_CFG      = 0x0F01,
        HCLGE_OPC_VLAN_PORT_RX_CFG      = 0x0F02,
 
-       /* Interrupts commands */
+       /* Interrupts cmd */
        HCLGE_OPC_ADD_RING_TO_VECTOR    = 0x1503,
        HCLGE_OPC_DEL_RING_TO_VECTOR    = 0x1504,
 
-       /* MAC commands */
+       /* MAC command */
        HCLGE_OPC_MAC_VLAN_ADD              = 0x1000,
        HCLGE_OPC_MAC_VLAN_REMOVE           = 0x1001,
        HCLGE_OPC_MAC_VLAN_TYPE_ID          = 0x1002,
@@ -199,13 +202,13 @@ enum hclge_opcode_type {
        HCLGE_OPC_MAC_ETHTYPE_REMOVE    = 0x1011,
        HCLGE_OPC_MAC_VLAN_MASK_SET     = 0x1012,
 
-       /* Multicast linear table commands */
+       /* Multicast linear table cmd */
        HCLGE_OPC_MTA_MAC_MODE_CFG          = 0x1020,
        HCLGE_OPC_MTA_MAC_FUNC_CFG          = 0x1021,
        HCLGE_OPC_MTA_TBL_ITEM_CFG          = 0x1022,
        HCLGE_OPC_MTA_TBL_ITEM_QUERY    = 0x1023,
 
-       /* VLAN commands */
+       /* VLAN command */
        HCLGE_OPC_VLAN_FILTER_CTRL          = 0x1100,
        HCLGE_OPC_VLAN_FILTER_PF_CFG    = 0x1101,
        HCLGE_OPC_VLAN_FILTER_VF_CFG    = 0x1102,
@@ -213,7 +216,7 @@ enum hclge_opcode_type {
        /* MDIO command */
        HCLGE_OPC_MDIO_CONFIG           = 0x1900,
 
-       /* QCN commands */
+       /* QCN command */
        HCLGE_OPC_QCN_MOD_CFG           = 0x1A01,
        HCLGE_OPC_QCN_GRP_TMPLT_CFG     = 0x1A02,
        HCLGE_OPC_QCN_SHAPPING_IR_CFG   = 0x1A03,
@@ -223,7 +226,7 @@ enum hclge_opcode_type {
        HCLGE_OPC_QCN_AJUST_INIT        = 0x1A07,
        HCLGE_OPC_QCN_DFX_CNT_STATUS    = 0x1A08,
 
-       /* Mailbox command */
+       /* Mailbox cmd */
        HCLGEVF_OPC_MBX_PF_TO_VF        = 0x2000,
 
        /* Led command */
index d3d88e7b8443f238d71cf6e66ef2aed61011a198..9c402d9babbe62cf967c86e16c9a3cab830342fa 100644 (file)
@@ -5929,7 +5929,6 @@ static int hclge_set_channels(struct hnae3_handle *handle, u32 new_tqps_num)
        u32 *rss_indir;
        int ret, i;
 
-       /* Free old tqps, and reallocate with new tqp number when nic setup */
        hclge_release_tqp(vport);
 
        ret = hclge_knic_setup(vport, new_tqps_num);
index 307487950138b6f262e5334243db5375864b954d..d5de27fff650140587c69d2ea8558aa7847e7378 100644 (file)
@@ -201,10 +201,7 @@ struct hlcge_tqp_stats {
 };
 
 struct hclge_tqp {
-       /* copy of device pointer from pci_dev,
-        * used when perform DMA mapping
-        */
-       struct device *dev;
+       struct device *dev;     /* Device for DMA mapping */
        struct hnae3_queue q;
        struct hlcge_tqp_stats tqp_stats;
        u16 index;      /* Global index in a NIC controller */
@@ -494,11 +491,13 @@ struct hclge_dev {
        u16 num_tqps;                   /* Num task queue pairs of this PF */
        u16 num_req_vfs;                /* Num VFs requested for this PF */
 
-       u16 base_tqp_pid;       /* Base task tqp physical id of this PF */
+       /* Base task tqp physical id of this PF */
+       u16 base_tqp_pid;
        u16 alloc_rss_size;             /* Allocated RSS task queue */
        u16 rss_size_max;               /* HW defined max RSS task queue */
 
-       u16 fdir_pf_filter_count; /* Num of guaranteed filters for this PF */
+       /* Num of guaranteed filters for this PF */
+       u16 fdir_pf_filter_count;
        u16 num_alloc_vport;            /* Num vports this driver supports */
        u32 numa_node_mask;
        u16 rx_buf_len;
@@ -560,7 +559,7 @@ struct hclge_dev {
        u32 mps; /* Max packet size */
 
        enum hclge_mta_dmac_sel_type mta_mac_sel_type;
-       bool enable_mta; /* Multicast filter enable */
+       bool enable_mta; /* Mutilcast filter enable */
 
        struct hclge_vlan_type_cfg vlan_type_cfg;